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@INPROCEEDINGS{Herten:824111,
author = {Herten, Andreas and Kraus, Jiri and Hernandez, Oscar and
Ravindar, Archana and Hagleitner, Christoph},
title = {{T}utorial: {A}pplication {P}orting and {O}ptimization on
{GPU}-{A}ccelerated {POWER} {A}rchitectures},
reportid = {FZJ-2016-06735},
year = {2016},
note = {Full-day Tutorial with six talks and three hands-on
sessions.},
abstract = {The POWER processor has re-emerged as a technology for
supercomputer architectures. One major reason is the tight
integration of processor and GPU accelerator through the new
NVLink technology. Two major sites in the US, ORNL and LLNL,
have already decided to have their pre-exascale systems
being based on this new architecture. This tutorial will
give an opportunity to obtain in-depth knowledge and
experience with GPU-accelerated POWER nodes. It focuses on
porting applications to a single node and covers the topics
architecture, compilers, performance analysis, and multi-GPU
programming. The tutorial will include an overview of the
new NVLink based node architectures, lectures on first-hand
experience in porting to this architecture, and will
conclude with exercises using tools to focus on
performance.},
month = {Nov},
date = {2016-11-13},
organization = {International Conference for High
Performance Computing, Networking,
Storage and Analysis (The
Supercomputing Conference), Salt Lake
City, UT (United States of America), 13
Nov 2016 - 18 Nov 2016},
subtyp = {After Call},
cin = {JSC},
cid = {I:(DE-Juel1)JSC-20090406},
pnm = {513 - Supercomputer Facility (POF3-513)},
pid = {G:(DE-HGF)POF3-513},
typ = {PUB:(DE-HGF)31},
url = {https://juser.fz-juelich.de/record/824111},
}