001     824111
005     20210129224943.0
037 _ _ |a FZJ-2016-06735
041 _ _ |a English
100 1 _ |a Herten, Andreas
|0 P:(DE-Juel1)145478
|b 0
|e Corresponding author
|u fzj
111 2 _ |a International Conference for High Performance Computing, Networking, Storage and Analysis (The Supercomputing Conference)
|g SC16
|c Salt Lake City, UT
|d 2016-11-13 - 2016-11-18
|w United States of America
245 _ _ |a Tutorial: Application Porting and Optimization on GPU-Accelerated POWER Architectures
|f 2016-11-14 -
260 _ _ |c 2016
336 7 _ |a Conference Paper
|0 33
|2 EndNote
336 7 _ |a Other
|2 DataCite
336 7 _ |a INPROCEEDINGS
|2 BibTeX
336 7 _ |a LECTURE_SPEECH
|2 ORCID
336 7 _ |a Talk (non-conference)
|b talk
|m talk
|0 PUB:(DE-HGF)31
|s 1480081882_10111
|2 PUB:(DE-HGF)
|x After Call
336 7 _ |a Other
|2 DINI
500 _ _ |a Full-day Tutorial with six talks and three hands-on sessions.
520 _ _ |a The POWER processor has re-emerged as a technology for supercomputer architectures. One major reason is the tight integration of processor and GPU accelerator through the new NVLink technology. Two major sites in the US, ORNL and LLNL, have already decided to have their pre-exascale systems being based on this new architecture. This tutorial will give an opportunity to obtain in-depth knowledge and experience with GPU-accelerated POWER nodes. It focuses on porting applications to a single node and covers the topics architecture, compilers, performance analysis, and multi-GPU programming. The tutorial will include an overview of the new NVLink based node architectures, lectures on first-hand experience in porting to this architecture, and will conclude with exercises using tools to focus on performance.
536 _ _ |a 513 - Supercomputer Facility (POF3-513)
|0 G:(DE-HGF)POF3-513
|c POF3-513
|f POF III
|x 0
700 1 _ |a Kraus, Jiri
|0 P:(DE-Juel1)137023
|b 1
|u fzj
700 1 _ |a Hernandez, Oscar
|0 P:(DE-HGF)0
|b 2
700 1 _ |a Ravindar, Archana
|0 P:(DE-HGF)0
|b 3
700 1 _ |a Hagleitner, Christoph
|0 P:(DE-HGF)0
|b 4
909 C O |o oai:juser.fz-juelich.de:824111
|p VDB
910 1 _ |a Forschungszentrum Jülich
|0 I:(DE-588b)5008462-8
|k FZJ
|b 0
|6 P:(DE-Juel1)145478
910 1 _ |a Forschungszentrum Jülich
|0 I:(DE-588b)5008462-8
|k FZJ
|b 1
|6 P:(DE-Juel1)137023
913 1 _ |a DE-HGF
|b Key Technologies
|1 G:(DE-HGF)POF3-510
|0 G:(DE-HGF)POF3-513
|2 G:(DE-HGF)POF3-500
|v Supercomputer Facility
|x 0
|4 G:(DE-HGF)POF
|3 G:(DE-HGF)POF3
|l Supercomputing & Big Data
914 1 _ |y 2016
915 _ _ |a No Authors Fulltext
|0 StatID:(DE-HGF)0550
|2 StatID
920 1 _ |0 I:(DE-Juel1)JSC-20090406
|k JSC
|l Jülich Supercomputing Center
|x 0
980 _ _ |a talk
980 _ _ |a VDB
980 _ _ |a UNRESTRICTED
980 _ _ |a I:(DE-Juel1)JSC-20090406


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