TY  - CONF
AU  - Rajovic, Nikola
AU  - Rico, Alejandro
AU  - Mantovani, Filippo
AU  - Ruiz, Daniel
AU  - Vilarrubi, Josep Oriol
AU  - Gomez, Constantino
AU  - Backes, Luna
AU  - Nieto, Diego
AU  - Servat, Harald
AU  - Martorell, Xavier
AU  - Labarta, Jesus
AU  - Ayguade, Eduard
AU  - Adeniyi-Jones, Chris
AU  - Derradji, Said
AU  - Gloaguen, Herve
AU  - Lanucara, Piero
AU  - Sanna, Nico
AU  - Mehaut, Jean-Francois
AU  - Pouget, Kevin
AU  - Videau, Brice
AU  - Boyer, Eric
AU  - Allalen, Momme
AU  - Auweter, Axel
AU  - Brayford, David
AU  - Tafani, Daniele
AU  - Weinberg, Volker
AU  - Brömmel, Dirk
AU  - Halver, Rene
AU  - Meinke, Jan
AU  - Beivide, Ramon
AU  - Benito, Mariano
AU  - Vallejo, Enrique
AU  - Valero, Mateo
AU  - Ramirez, Alex
TI  - The Mont-Blanc Prototype: An Alternative Approach for HPC Systems
CY  - Piscataway, NJ, USA
PB  - IEEE Press
M1  - FZJ-2016-07827
SP  - 38
PY  - 2016
AB  - High-performance computing (HPC) is recognized as one of the pillars for further progress in science, industry, medicine, and education. Current HPC systems are being developed to overcome emerging architectural challenges in order to reach Exascale level of performance, projected for the year 2020. The much larger embedded and mobile market allows for rapid development of intellectual property (IP) blocks and provides more flexibility in designing an application-specific system-on-chip (SoC), in turn providing the possibility in balancing performance, energy-efficiency, and cost. In the Mont-Blanc project, we advocate for HPC systems being built from such commodity IP blocks, currently used in embedded and mobile SoCs.As a first demonstrator of such an approach, we present the Mont-Blanc prototype; the first HPC system built with commodity SoCs, memories, and network interface cards (NICs) from the embedded and mobile domain, and off-the-shelf HPC networking, storage, cooling, and integration solutions. We present the system's architecture and evaluate both performance and energy efficiency. Further, we compare the system's abilities against a production level supercomputer. At the end, we discuss parallel scalability and estimate the maximum scalability point of this approach across a set of applications.
T2  - SC '16
CY  - 13 Nov 2016 - 18 Nov 2016, Salt Lake City, Utah (USA)
Y2  - 13 Nov 2016 - 18 Nov 2016
M2  - Salt Lake City, Utah, USA
LB  - PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
DO  - DOI:10.1109/SC.2016.37
UR  - https://juser.fz-juelich.de/record/825364
ER  -