% IMPORTANT: The following is UTF-8 encoded.  This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.

@INPROCEEDINGS{Rajovic:825364,
      author       = {Rajovic, Nikola and Rico, Alejandro and Mantovani, Filippo
                      and Ruiz, Daniel and Vilarrubi, Josep Oriol and Gomez,
                      Constantino and Backes, Luna and Nieto, Diego and Servat,
                      Harald and Martorell, Xavier and Labarta, Jesus and Ayguade,
                      Eduard and Adeniyi-Jones, Chris and Derradji, Said and
                      Gloaguen, Herve and Lanucara, Piero and Sanna, Nico and
                      Mehaut, Jean-Francois and Pouget, Kevin and Videau, Brice
                      and Boyer, Eric and Allalen, Momme and Auweter, Axel and
                      Brayford, David and Tafani, Daniele and Weinberg, Volker and
                      Brömmel, Dirk and Halver, Rene and Meinke, Jan and Beivide,
                      Ramon and Benito, Mariano and Vallejo, Enrique and Valero,
                      Mateo and Ramirez, Alex},
      title        = {{T}he {M}ont-{B}lanc {P}rototype: {A}n {A}lternative
                      {A}pproach for {HPC} {S}ystems},
      address      = {Piscataway, NJ, USA},
      publisher    = {IEEE Press},
      reportid     = {FZJ-2016-07827},
      pages        = {38},
      year         = {2016},
      comment      = {Proceedings of the International Conference for High
                      Performance Computing, Networking, Storage and Analysis},
      booktitle     = {Proceedings of the International
                       Conference for High Performance
                       Computing, Networking, Storage and
                       Analysis},
      abstract     = {High-performance computing (HPC) is recognized as one of
                      the pillars for further progress in science, industry,
                      medicine, and education. Current HPC systems are being
                      developed to overcome emerging architectural challenges in
                      order to reach Exascale level of performance, projected for
                      the year 2020. The much larger embedded and mobile market
                      allows for rapid development of intellectual property (IP)
                      blocks and provides more flexibility in designing an
                      application-specific system-on-chip (SoC), in turn providing
                      the possibility in balancing performance, energy-efficiency,
                      and cost. In the Mont-Blanc project, we advocate for HPC
                      systems being built from such commodity IP blocks, currently
                      used in embedded and mobile SoCs.As a first demonstrator of
                      such an approach, we present the Mont-Blanc prototype; the
                      first HPC system built with commodity SoCs, memories, and
                      network interface cards (NICs) from the embedded and mobile
                      domain, and off-the-shelf HPC networking, storage, cooling,
                      and integration solutions. We present the system's
                      architecture and evaluate both performance and energy
                      efficiency. Further, we compare the system's abilities
                      against a production level supercomputer. At the end, we
                      discuss parallel scalability and estimate the maximum
                      scalability point of this approach across a set of
                      applications.},
      month         = {Nov},
      date          = {2016-11-13},
      organization  = {SC '16, Salt Lake City, Utah (USA), 13
                       Nov 2016 - 18 Nov 2016},
      cin          = {JSC},
      cid          = {I:(DE-Juel1)JSC-20090406},
      pnm          = {511 - Computational Science and Mathematical Methods
                      (POF3-511) / MONT-BLANC 2 - Mont-Blanc 2, European scalable
                      and power efficient HPC platform based onlow-power embedded
                      technology (610402) / MONT-BLANC - Mont-Blanc, European
                      scalable and power efficient HPC platform based on low-power
                      embedded technology (288777)},
      pid          = {G:(DE-HGF)POF3-511 / G:(EU-Grant)610402 /
                      G:(EU-Grant)288777},
      typ          = {PUB:(DE-HGF)8 / PUB:(DE-HGF)7},
      doi          = {10.1109/SC.2016.37},
      url          = {https://juser.fz-juelich.de/record/825364},
}