Contribution to a conference proceedings/Contribution to a book FZJ-2017-03736

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Trace-Based Detection of Lock Contention in MPI One-Sided Communication

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2017
Springer International Publishing Cham

Tools for High Performance Computing 2016 / Niethammer, Christoph (Editor) ; Cham : Springer International Publishing, 2017, Chapter 6 ; ISBN: 978-3-319-56701-3
10th International Workshop on Parallel Tools for High Performance Computing, IPTW'16, StuttgartStuttgart, Germany, 4 Oct 2016 - 5 Oct 20162016-10-042016-10-05
Cham : Springer International Publishing 97-114 () [10.1007/978-3-319-56702-0_6]

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Abstract: Performance analysis is an essential part of the development process of HPC applications. Thus, developers need adequate tools to evaluate design and implementation decisions to effectively develop efficient parallel applications. Therefore, it is crucial that tools provide an as complete support as possible for the available language and library features to ensure that design decisions are not negatively influenced by the level of available tool support. The message passing interface (MPI) supports three basic communication paradigms: point-to-point, collective, and one-sided. Each of these targets and excels at a specific application scenario. While current performance tools support the first two quite well, one-sided communication is often neglected. In our earlier work, we were able to reduce this gap by showing how wait states in MPI one-sided communication using active-target synchronization can be detected at large scale using our trace-based message replay technique. Further extending our work on the detection of progress-related wait states in ARMCI, this paper presents an improved infrastructure that is capable of not only detecting progress-related wait states, but also wait states due to lock contention in MPI passive-target synchronization. We present an event-based definition of lock contention, the trace-based algorithm to detect it, as well as initial results with a micro-benchmark and an application kernel scaling up to 65,536 processes.


Contributing Institute(s):
  1. JARA - HPC (JARA-HPC)
  2. Jülich Supercomputing Center (JSC)
Research Program(s):
  1. 511 - Computational Science and Mathematical Methods (POF3-511) (POF3-511)
  2. ATMLPP - ATML Parallel Performance (ATMLPP) (ATMLPP)

Appears in the scientific report 2017
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 Record created 2017-05-22, last modified 2025-03-14



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