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| Home > Publications database > NestMC: A new multi-compartment neuronal network simulator > print |
| 001 | 834363 | ||
| 005 | 20210129230634.0 | ||
| 024 | 7 | _ | |a 2128/14860 |2 Handle |
| 037 | _ | _ | |a FZJ-2017-04336 |
| 100 | 1 | _ | |a Peyser, Alexander |0 P:(DE-Juel1)161525 |b 0 |e Corresponding author |
| 111 | 2 | _ | |c Jülich |d 2017-01-23 - 2017-01-25 |w Germany |
| 245 | _ | _ | |a NestMC: A new multi-compartment neuronal network simulator |
| 260 | _ | _ | |a Jülich |c 2017 |b Forschungszentrum Jülich Jülich Supercomputing Centre |
| 295 | 1 | 0 | |a JUQUEEN Extreme Scaling Workshop 2017 |
| 300 | _ | _ | |a 31-36 |
| 336 | 7 | _ | |a BOOK_CHAPTER |2 ORCID |
| 336 | 7 | _ | |a Book Section |0 7 |2 EndNote |
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| 336 | 7 | _ | |a INBOOK |2 BibTeX |
| 336 | 7 | _ | |a Output Types/Book chapter |2 DataCite |
| 336 | 7 | _ | |a Contribution to a book |b contb |m contb |0 PUB:(DE-HGF)7 |s 1563262279_389 |2 PUB:(DE-HGF) |
| 490 | 0 | _ | |a JSC Internal Report |v FZJ-JSC-IB-2017-01 |
| 520 | _ | _ | |a NestMC is a prototype simulator for neuronal networks composed of morphologically detailed neurons.This new code is being designed for the new generation of HPC infrastructure composed of massively parallel and heterogeneous architectures.Planned architectures include `normal' non-vectorized CPUs, vectorized CPUs such as KNL, GPUs and other boosters such as FPGAs.For OpenMP, the current architecture with 1 thread per rank handling all spike communications and exchange scales well up to 2048 nodes, and continues to give performance gains up to full JUQUEEN.Using threading pools that partially implement the functionality of TBB, we see good weak-scaling up to 4096 nodes and can expect to see performance gains up to JUQUEEN scale.For more complex neuron models and morphologies which increase the ratio of computation time to communication time, weak scaling should be significantly improved; the cases tested are 'worst case scenarios' relative to production runs.With this workshop, we identified the limits of weak-scaling on the current architecture.This motivated the development of a threading backend for architectures where TBB is not available.Since the communication time is dominated by processing the global spike buffers, a dry-run mode has been developed taking advantage of this performance profile, which will allow us to estimate these results using negligible resources. |
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| 536 | _ | _ | |a HBP SGA1 - Human Brain Project Specific Grant Agreement 1 (720270) |0 G:(EU-Grant)720270 |c 720270 |f H2020-Adhoc-2014-20 |x 2 |
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| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/834363/files/report.pdf |y OpenAccess |
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