TY  - JOUR
AU  - Quagli, T.
AU  - Brinkmann, K.-T.
AU  - Calvo, D.
AU  - Pietro, V. Di
AU  - Lai, A.
AU  - Riccardi, A.
AU  - Ritman, J.
AU  - Rivetti, A.
AU  - Rolo, M. D.
AU  - Stockmanns, T.
AU  - Wheadon, R.
AU  - Zambanini, A.
TI  - First results of the front-end ASIC for the strip detector of the PANDA MVD
JO  - Journal of Instrumentation
VL  - 12
IS  - 03
SN  - 1748-0221
CY  - London
PB  - Inst. of Physics
M1  - FZJ-2017-05213
SP  - C03063 - C03063
PY  - 2017
AB  - PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.
LB  - PUB:(DE-HGF)16
UR  - <Go to ISI:>//WOS:000406997400063
DO  - DOI:10.1088/1748-0221/12/03/C03063
UR  - https://juser.fz-juelich.de/record/836089
ER  -