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@MASTERSTHESIS{Meka:836990,
author = {Meka, Rathnakar},
title = {{I}mplementation of a {JTAG} {V}erification {E}nvironment
for a {C}omplex {H}ighly {I}ntegrated {R}eal {S}o{C}
{S}olution for a {N}eutrino {D}etector},
volume = {4402},
school = {Univ. Duisburg},
type = {MA},
address = {Jülich},
publisher = {Forschungszentrum Jülich GmbH Zentralbibliothek, Verlag},
reportid = {FZJ-2017-06012, Juel-4402},
series = {Berichte des Forschungszentrums Jülich},
pages = {XI, 64 p.},
year = {2017},
note = {Univ. Duisburg, Masterarbeit, 2017},
abstract = {This master thesis work deals with the configuration,
enabling for the verification and interpretation of the data
for the application specific designed read-out Vulcan chip
by means of MATLAB tool for applications. Vulcan chip is an
advanced system-on-chip (SoC) also called as an
analog-to-digital unit(ADU) and it is developed by the
Central Institute of Engineering, Electronics and Analytics-
Electronic Systems (ZEA-2), Forschungszentrum Jülich GmbH.
This chip will be used in the Jiangmen Underground Neutrino
Observatory (JUNO) detector project to preprocess and
digitize the analog data generated by the applied
Photomultiplier Tubes (PMTs) reacting on neutrino events. A
configuration system is needed to enable the verification of
the designed chip and the digitized data has to be
interpreted and verified. A JTAG communication protocol is
implemented to investigate the configuration of the chip. At
first, the theoretical fundamentals of the designed chip
will be explained to provide the basic understanding of the
designed chip. This includes the characteristics of the chip
by means of the functionality of individual blocks,
configuration interface and different data modes in the
chip. Furthermore, a configuration system is implemented
which will be used to configure the chip and enables it for
verification. Moreover, the configuration libraries are
implemented in MATLAB. These libraries enable the chip for
verification and test the write and read operations of all
configuration registers in the chip. The implemented
configuration system and libraries successfully configures
the chip and the configuration libraries will be used in
further verification tests. Secondly, the data extraction
algorithms are implemented in MATLAB to analyze the data
indifferent modes for the chip. The algorithms are tested
for different data modes and the results are included in the
report. Finally, the created data extraction algorithms will
be used in the automatic data acquisition and analysis
environment for easy analysis of the data from the chip.},
cin = {ZEA-2},
cid = {I:(DE-Juel1)ZEA-2-20090406},
pnm = {612 - Cosmic Matter in the Laboratory (POF3-612)},
pid = {G:(DE-HGF)POF3-612},
typ = {PUB:(DE-HGF)3 / PUB:(DE-HGF)29 / PUB:(DE-HGF)19},
url = {https://juser.fz-juelich.de/record/836990},
}