TY  - GEN
AU  - Herten, Andreas
AU  - Pleiter, Dirk
AU  - Kraus, Jiri
AU  - Ravindar, Archana
AU  - Hagleitner, Christoph
TI  - Application Porting and Optimization on GPU-accelerated POWER Architectures
M1  - FZJ-2017-07717
PY  - 2017
AB  - The POWER processor has re-emerged as a technology for supercomputer architectures. One major reason is the tight integration of processor and GPU accelerator through the new NVLink technology. Two major sites in the US, ORNL and LLNL, have already decided to have their pre-exascale systems being based on this new architecture. This tutorial will give an opportunity to obtain in-depth knowledge and experience with GPU-accelerated POWER nodes. It focuses on porting applications to a single node and covers the topics architecture, compilers, performance analysis and tuning, and multi-GPU programming. The tutorial will include an overview of the new NVLink-based node architectures, lectures on first-hand experience in porting to this architecture, and exercises using tools to focus on performance.
T2  - International Conference for High Performance Computing, Networking, Storage and Analysis (The Supercomputing Conference)
CY  - 13 Nov 2017 - 13 Nov 2017, Denver, CO (United States of America)
Y2  - 13 Nov 2017 - 13 Nov 2017
M2  - Denver, CO, United States of America
LB  - PUB:(DE-HGF)17
UR  - https://juser.fz-juelich.de/record/840162
ER  -