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@MISC{Herten:840162,
author = {Herten, Andreas and Pleiter, Dirk and Kraus, Jiri and
Ravindar, Archana and Hagleitner, Christoph},
title = {{A}pplication {P}orting and {O}ptimization on
{GPU}-accelerated {POWER} {A}rchitectures},
reportid = {FZJ-2017-07717},
year = {2017},
abstract = {The POWER processor has re-emerged as a technology for
supercomputer architectures. One major reason is the tight
integration of processor and GPU accelerator through the new
NVLink technology. Two major sites in the US, ORNL and LLNL,
have already decided to have their pre-exascale systems
being based on this new architecture. This tutorial will
give an opportunity to obtain in-depth knowledge and
experience with GPU-accelerated POWER nodes. It focuses on
porting applications to a single node and covers the topics
architecture, compilers, performance analysis and tuning,
and multi-GPU programming. The tutorial will include an
overview of the new NVLink-based node architectures,
lectures on first-hand experience in porting to this
architecture, and exercises using tools to focus on
performance.},
month = {Nov},
date = {2017-11-13},
organization = {International Conference for High
Performance Computing, Networking,
Storage and Analysis (The
Supercomputing Conference), Denver, CO
(United States of America), 13 Nov 2017
- 13 Nov 2017},
subtyp = {After Call},
cin = {JSC},
cid = {I:(DE-Juel1)JSC-20090406},
pnm = {513 - Supercomputer Facility (POF3-513)},
pid = {G:(DE-HGF)POF3-513},
typ = {PUB:(DE-HGF)17},
url = {https://juser.fz-juelich.de/record/840162},
}