TY  - CONF
AU  - Arenaz, Manuel
AU  - Hernandez, Oscar
AU  - Pleiter, Dirk
TI  - The Technological Roadmap of Parallware and Its Alignment with the OpenPOWER Ecosystem
VL  - 10524
CY  - Cham
PB  - Springer International Publishing
M1  - FZJ-2017-07940
SN  - 978-3-319-67629-6 (print)
T2  - Lecture Notes in Computer Science
SP  - 237 - 253
PY  - 2017
AB  - Accelerated, heterogeneous systems are becoming the norm in High Performance Computing (HPC). The challenge is choosing the right parallel programming framework to maximize performance, efficiency and productivity. The design and implementation of benchmark codes is important in many activities carried out at HPC facilities. Well known examples are fair comparison of R+D results, acceptance tests for the procurement of HPC systems, and the creation of miniapps to better understand how to port real applications to current and future supercomputers. As a result of these efforts there is a variety of public benchmark suites available to the HPC community, e.g., Linpack, NAS Parallel Benchmarks (NPB), CORAL benchmarks, and Unified European Application Benchmark Suite. The upcoming next generation of supercomputers is now leading to create new miniapps to evaluate the potential performance of different programming models on mission critical applications, such as the XRayTrace miniapp under development at the Oak Ridge National Laboratory. This paper presents the technological roadmap of Parallware, a new suite of tools for high-productivity HPC education and training, that also facilitates the porting of HPC applications. This roadmap is driven by best practices used by HPC expert developers in the parallel scientific C/C++ codes found in CORAL, NPB, and XRayTrace. The paper reports preliminary results about the parallel design patterns used in such benchmark suites, which define features that need to be supported in upcoming realeases of Parallware tools. The paper also presents performance results using standards OpenMP 4.5 and OpenACC 2.5, compilers GNU and PGI, and devices CPU and GPU from IBM, Intel and NVIDIA.
T2  - International Conference on High Performance Computing
CY  - 19 Jun 2017 - 22 Jun 2017, Frankfurt (Germany)
Y2  - 19 Jun 2017 - 22 Jun 2017
M2  - Frankfurt, Germany
LB  - PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
DO  - DOI:10.1007/978-3-319-67630-2_19
UR  - https://juser.fz-juelich.de/record/840423
ER  -