%0 Thesis
%A Breuer, Thomas
%T Development of ReRAM-based Devices for Logic- and Computation-in-Memory Applications
%V 51
%I RWTH Aachen
%V Dissertation
%C Jülich
%M FZJ-2017-08599
%@ 978-3-95806-270-2
%B Schriften des Forschungszentrums Jülich. Reihe Information / Information
%P x, 180 S.
%D 2017
%Z RWTH Aachen, Diss., 2017
%X Rapid growth of future information technology depends on energy-efficient computation and ultra-high density data storage. Non-volatile redox-based resistive switching memory (ReRAM) devices offer logic-in-memory and cognitive computing capabilities and can redefine von Neuman computer architecture. The Complementary Resistive Switch (CRS), where two bipolar switching cells are vertically stacked, is a promising candidate and enables integration of highly dense passive nano-crossbar arrays in 4F$^{2}$ structure (with minimum feature size $\textit{F}$). Due to the intrinsic non-linearity, the need for selector devices in the array is no longer required. Firstly, Ta$_{2}$O$_{5}$-based two-terminal devices (no access to the middle electrode (ME)) are considered, which facilitate simple integration and low fabrication cost. Their electrical characteristics are compared with switching of three-terminal devices (exhibiting access to the ME), in order to investigate the impact of single cell properties on the whole CRS. Initial electroforming process in the three-terminal devices is carried out by applying voltage stimuli to individual ReRAM cells. However, two-terminal devices require introduction of a novel procedure, which enables separate and controlled electroforming for low-current operations (< 300 μA). Such devices (with improved endurance about 10$^{6}$ cycles) have been used to implement fuzzy logic in terms of MIN / MAX gates (concept suggested by Klimo et al. in [7], Nielen et al. in [8]), which could enable small-size sorting networks. To reduce fabrication complexity, vertically stacked Pt|HfO$_{2}$|Hf|Pt ReRAM stacks are investigated, which offer similar I-V characteristics to the CRS, referredto as Complementary Switch (CS). The intrinsic complementary switching can be modified externally to eight-wise and counter-eight-wise bipolar switching. However, the Hf electrode thickness has also impact on the actual switching mode. Further process parameters, such as deposition rate of HfO$_{2}$, have much more of an impact on the initial device. Next, integration of the CS into 1×8 passive crossbar arrays is demonstrated. First, the implementation of all Boolean CRS-logic operations (concept suggested by Linn et al. in [9]) with the CS is proven, showing remarkable endurance (10$^{9}$ cycles). Afterward, two in-memory adders (concepts introduced by Siemon et al. in [10]) are experimentally demonstrated, which perform addition and subtraction operations. Altogether, this could pave the way for next-generation information technology for parallel processing-in-memory architecture, which is implemented by ReRAMs embedded in energy-efficient, ultra-dense 4F$^{2}$ passive crossbar arrays.
%F PUB:(DE-HGF)3 ; PUB:(DE-HGF)11
%9 BookDissertation / PhD Thesis
%U https://juser.fz-juelich.de/record/841561