TY  - CONF
AU  - Rigo, Alvise
AU  - Pinto, Christian
AU  - Pouget, Kevin
AU  - Raho, Daniel
AU  - Dutoit, Denis
AU  - Martinez, Pierre-Yves
AU  - Doran, Chris
AU  - Benini, Luca
AU  - Mavroidis, Iakovos
AU  - Marazakis, Manolis
AU  - Bartsch, Valeria
AU  - Lonsdale, Guy
AU  - Pop, Antoniu
AU  - Goodacre, John
AU  - Colliot, Annaik
AU  - Carpenter, Paul
AU  - Radojkovic, Petar
AU  - Pleiter, Dirk
AU  - Drouin, Dominique
AU  - Dinechin, Benoit Dupont de
TI  - Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach
PB  - IEEE
M1  - FZJ-2018-01203
SP  - 486-493
PY  - 2017
AB  - Power consumption and high compute density are the key factors to be considered when building a compute node for the upcoming Exascale revolution. Current architectural design and manufacturing technologies are not able to provide the requested level of density and power efficiency to realise an operational Exascale machine. A disruptive change in the hardware design and integration process is needed in order to cope with the requirements of this forthcoming computing target. This paper presents the ExaNoDe H2020 research project aiming to design a highly energy efficient and highly integrated heterogeneous compute node targeting Exascale level computing, mixing low-power processors, heterogeneous co-processors and using advanced hardware integration technologies with the novel UNIMEM Global Address Space memory system.
T2  - 2017 Euromicro Conference on Digital System Design (DSD)
CY  - 30 Aug 2017 - 1 Sep 2017, Vienna (Austria)
Y2  - 30 Aug 2017 - 1 Sep 2017
M2  - Vienna, Austria
LB  - PUB:(DE-HGF)8
UR  - <Go to ISI:>//WOS:000427097100070
DO  - DOI:10.1109/DSD.2017.37
UR  - https://juser.fz-juelich.de/record/843621
ER  -