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000844070 1001_ $$0P:(DE-Juel1)171859$$aSubraveti, Janani$$b0$$eCorresponding author$$ufzj
000844070 245__ $$aImplementation of UDP communication on a ZYNQ platform for processing clustered data based on multiple Gigabit Ethernet ports for phenoPET$$f- 2018-03-29
000844070 260__ $$aJülich$$bForschungszentrum Jülich GmbH Zentralbibliothek, Verlag$$c2018
000844070 300__ $$aiv, 56 p.
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000844070 4900_ $$aBerichte des Forschungszentrums Jülich$$v4406
000844070 502__ $$aMasterarbeit, Hochsch. Bremerhaven, 2017$$bMasterarbeit$$cHochsch. Bremerhaven$$d2017
000844070 520__ $$aAs part of biological research carried out on plant phenotyping within the Jülich Plant Phenotyping Centre, a modality to detect the positron emitting radionuclides has been setup. The investigation of transport of short-lived carbon isotope $^{11}$C within plants using $^{11}$CO$_{2}$ as radiotracer fixed during the photosynthesis dark reactions is the idea behind this research. The Flow and distribution of $^{11}$C-labelled photo assimilates within a plant can then be imaged using the PET (Positron Emission Tomography) technology. To this end, a PET imaging system has been developed. This consists of scintillation detectors with scintillation crystals coupled to photodetectors. The radiation, which is emitted after the uptake of the radiotracer, causes ligh tpulses within the scintillation crystals. This light is then converted into electrical signals by the photodetector. The “phenoPET” system is a PET scanner dedicated for plant research that employs digital SiPMs (Silicon Photo Multipliers) as photodetectors organised in 36 detector modules resulting in hit events based on the triggered photon counts fitted in data frames by acentral FPGA based unit. Present study starts with developing a prototype that uses Ethernet FMC module (from Opsero Electronic Design) with four Gigabit Ethernet ports. Concerning illustration based on the pre framework design of data transfer from detector modules, data stream flows from each detector module (consisting of 4 tiles) to the FPGA board (Xilinx Kintex-7 FPGA Mini Module Plus (Avnet)) on LVDS lines. From the FPGA board to the readout computer, USB 3.0 (at 300 MB/s (2.4 Gbps)) is used. For the connection from the readout computer to the storage system (located at air-conditioned place), 10 Gigabit Ethernet is used. Besides, our design is an addon to the module FPGA, data stream from module FPGA is sent to ZC706 evaluation board (Xilinx Zynq-7000 All Programmable SoC) when the Ethernet FMC module is mounted on FMC (FPGA Mezzanine Card) connector of the ZC706 board. The data is received by four ports over the UDP server application running on the Zynq Processing System. Data reduction technique like clustering on timestamps (when multiple data packets occur in an event of hits) is performed in a time window between 1 - 5 ns. Processed data is sent out from one of the 10 Gigabit Ethernet ports on ZC706 after frame skipping technique being performed on every fifth frame. This study provides a measurement of Ethernet bandwidth utilization versus actual bandwidth from the stress tests performed on the datagrams. It provides information about the utilization of multi processors when the UDP application is running.
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