TY  - JOUR
AU  - Narimani, K.
AU  - Glass, S.
AU  - Bernardy, P.
AU  - von den Driesch, N.
AU  - Zhao, Q. T.
AU  - Mantl, S.
TI  - Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents
JO  - Solid state electronics
VL  - 143
SN  - 0038-1101
CY  - Oxford [u.a.]
PB  - Pergamon, Elsevier Science
M1  - FZJ-2019-00015
SP  - 62 - 68
PY  - 2018
AB  - In this paper we present a silicon tunnel FET based on line-tunneling to achieve better subthreshold performance. The fabricated device shows an on-current of Ion = 2.55 × 10−7 A/µm at Vds = Von = Vgs − Voff = −0.5 V for an Ioff = 1 nA/µm and an average SS of 55 mV/dec over two orders of magnitude of Id. Furthermore, the analog figures of merit have been calculated and show that the transconductance efficiency gm/Id beats the MOSFET performance at low currents.
LB  - PUB:(DE-HGF)16
UR  - <Go to ISI:>//WOS:000430550600010
DO  - DOI:10.1016/j.sse.2018.01.007
UR  - https://juser.fz-juelich.de/record/859064
ER  -