Home > Publications database > DC/AC Compact Modeling of TFETs for Circuit Simulation of Logic Cells Based on an Analytical Physics-Based Framework > print

001     859069
005     20210130000152.0
024 7 _ |a 10.1109/Austrochip.2017.10
|2 doi
024 7 _ |a WOS:000427480800002
|2 WOS
037 _ _ |a FZJ-2019-00020
100 1 _ |a Horst, Fabian
|0 P:(DE-HGF)0
|b 0
|e Corresponding author
111 2 _ |a 2017 25th Austrochip Workshop on Microelectronics (Austrochip)
|c Linz
|d 2017-10-12 - 2017-10-12
|w Austria
245 _ _ |a DC/AC Compact Modeling of TFETs for Circuit Simulation of Logic Cells Based on an Analytical Physics-Based Framework
260 _ _ |c 2017
|b IEEE
295 1 0 |a 2017 Austrochip Workshop on Microelectronics (Austrochip) : [Proceedings] - IEEE, 2017. - ISBN 978-1-5386-3583-4 - doi:10.1109/Austrochip.2017.10
300 _ _ |a 6-10
336 7 _ |a CONFERENCE_PAPER
|2 ORCID
336 7 _ |a Conference Paper
|0 33
|2 EndNote
336 7 _ |a INPROCEEDINGS
|2 BibTeX
336 7 _ |a conferenceObject
|2 DRIVER
336 7 _ |a Output Types/Conference Paper
|2 DataCite
336 7 _ |a Contribution to a conference proceedings
|b contrib
|m contrib
|0 PUB:(DE-HGF)8
|s 1547481253_20255
|2 PUB:(DE-HGF)
336 7 _ |a Contribution to a book
|0 PUB:(DE-HGF)7
|2 PUB:(DE-HGF)
|m contb
520 _ _ |a This paper presents a DC/AC compact model for double-gate (DG) tunnel field-effect transistors (TFET) which is based on a unified analytical modeling framework. The closed-form model shows a good agreement with both, TCAD simulations and measurements on test structures. A Verilog-A implementation allows for a quick performance evaluation of the DC performance of logic cells. Results of a complementary TFET inverter are in good agreement to measurements. Simulations of an 8T SRAM cell clearly show the critical influence of the ambipolar behavior and leakage current on the performance. The fundamental analytical modeling framework provides deeper physical insight while considering additional effects as trap-assisted tunneling (TAT), junction profile steepness and hetero structures.
536 _ _ |a 521 - Controlling Electron Charge-Based Phenomena (POF3-521)
|0 G:(DE-HGF)POF3-521
|c POF3-521
|f POF III
|x 0
588 _ _ |a Dataset connected to CrossRef Conference
700 1 _ |a Farokhnejad, Atieh
|0 P:(DE-HGF)0
|b 1
700 1 _ |a Graef, Michael
|0 P:(DE-HGF)0
|b 2
700 1 _ |a Hosenfeld, Fabian
|0 P:(DE-HGF)0
|b 3
700 1 _ |a Luong, Gia Vinh
|0 P:(DE-HGF)0
|b 4
700 1 _ |a Liu, Chang
|0 P:(DE-HGF)0
|b 5
700 1 _ |a Zhao, Qing-Tai
|0 P:(DE-Juel1)128649
|b 6
|e Collaboration author
700 1 _ |a Lime, Francois
|0 P:(DE-HGF)0
|b 7
700 1 _ |a Iniguez, Benjamin
|0 P:(DE-HGF)0
|b 8
700 1 _ |a Kloes, Alexander
|0 P:(DE-HGF)0
|b 9
773 _ _ |a 10.1109/Austrochip.2017.10
856 4 _ |u https://juser.fz-juelich.de/record/859069/files/08114739-1.pdf
|y Restricted
856 4 _ |u https://juser.fz-juelich.de/record/859069/files/08114739-1.pdf?subformat=pdfa
|x pdfa
|y Restricted
909 C O |o oai:juser.fz-juelich.de:859069
|p VDB
910 1 _ |a Forschungszentrum Jülich
|0 I:(DE-588b)5008462-8
|k FZJ
|b 4
|6 P:(DE-HGF)0
910 1 _ |a Forschungszentrum Jülich
|0 I:(DE-588b)5008462-8
|k FZJ
|b 5
|6 P:(DE-HGF)0
910 1 _ |a Forschungszentrum Jülich
|0 I:(DE-588b)5008462-8
|k FZJ
|b 6
|6 P:(DE-Juel1)128649
913 1 _ |a DE-HGF
|b Key Technologies
|l Future Information Technology - Fundamentals, Novel Concepts and Energy Efficiency (FIT)
|1 G:(DE-HGF)POF3-520
|0 G:(DE-HGF)POF3-521
|2 G:(DE-HGF)POF3-500
|v Controlling Electron Charge-Based Phenomena
|x 0
|4 G:(DE-HGF)POF
|3 G:(DE-HGF)POF3
914 1 _ |y 2018
920 1 _ |0 I:(DE-Juel1)PGI-9-20110106
|k PGI-9
|l Halbleiter-Nanoelektronik
|x 0
980 _ _ |a contrib
980 _ _ |a VDB
980 _ _ |a contb
980 _ _ |a I:(DE-Juel1)PGI-9-20110106
980 _ _ |a UNRESTRICTED

LibraryCollectionCLSMajorCLSMinorLanguageAuthor
Marc 21