%0 Conference Paper
%A Luong, G. V.
%A Strangio, S.
%A Tiedemann, Andreas
%A Bernardy, P.
%A Trellenkamp, S.
%A Palestri, P.
%A Mantl, S.
%A Zhao, Q. T.
%T Experimental characterization of the static noise margins of strained silicon complementary tunnel-FET SRAM
%I IEEE
%M FZJ-2019-00021
%P 42-45
%D 2017
%< 2017 47th European Solid-State Device Research Conference (ESSDERC) : [Proceedings] - IEEE, 2017. - ISBN 978-1-5090-5978-2 - doi:10.1109/ESSDERC.2017.8066587
%X Half SRAM cells with strained Si nanowire complementary Tunnel-FETs (CTFET) have been fabricated to explore the capability of TFETs for 6T-SRAM. Static measurements on cells with outward faced n-TFET access transistors have been performed to determine the SRAM butterfly curves, allowing the assessment of cell functionality and stability. The forward p-i-n leakage at certain bias configuration of the access transistor may lead to malfunctioning storage operation, even without the contribution of the ambipolar behavior. Lowering the bit-line bias is found to mitigate such effect resulting in functional hold, read and write operation.
%B ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC)
%C 11 Sep 2017 - 14 Sep 2017, Leuven (Belgium)
Y2 11 Sep 2017 - 14 Sep 2017
M2 Leuven, Belgium
%F PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
%9 Contribution to a conference proceedingsContribution to a book
%R 10.1109/ESSDERC.2017.8066587
%U https://juser.fz-juelich.de/record/859070