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| Home > Publications database > Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study > print |
| 001 | 859079 | ||
| 005 | 20210130000156.0 | ||
| 024 | 7 | _ | |a 10.1109/LED.2017.2734943 |2 doi |
| 024 | 7 | _ | |a 0741-3106 |2 ISSN |
| 024 | 7 | _ | |a 1558-0563 |2 ISSN |
| 024 | 7 | _ | |a WOS:000413760600033 |2 WOS |
| 037 | _ | _ | |a FZJ-2019-00030 |
| 082 | _ | _ | |a 620 |
| 100 | 1 | _ | |a Saeidi, Ali |0 P:(DE-HGF)0 |b 0 |e Corresponding author |
| 245 | _ | _ | |a Negative Capacitance as Performance Booster for Tunnel FETs and MOSFETs: An Experimental Study |
| 260 | _ | _ | |a New York, NY |c 2017 |b IEEE |
| 336 | 7 | _ | |a article |2 DRIVER |
| 336 | 7 | _ | |a Output Types/Journal article |2 DataCite |
| 336 | 7 | _ | |a Journal Article |b journal |m journal |0 PUB:(DE-HGF)16 |s 1547480187_23129 |2 PUB:(DE-HGF) |
| 336 | 7 | _ | |a ARTICLE |2 BibTeX |
| 336 | 7 | _ | |a JOURNAL_ARTICLE |2 ORCID |
| 336 | 7 | _ | |a Journal Article |0 0 |2 EndNote |
| 520 | _ | _ | |a This letter reports for the first time a full experimental study of performance boosting of tunnel FETs (TFETs) and MOSFETs by negative capacitance (NC) effect. We discuss the importance of capacitance matching between a ferroelectric NC and a device capacitance to achieve hysteretic and non-hysteretic characteristics. PZT ferroelectric capacitors are connected to the gate of three terminals TFETs and MOSFETs and partial or full matching NC conditions for amplification and stability are obtained. First, we demonstrate the characteristics of hysteretic and non-hysteretic NC-TFETs. The main performance boosting is obtained for the non-hysteretic NC-TFET, where the ON-current is increased by a factor of 500 times, transconductance is enhanced by three orders of magnitude, and the low slope region is extended. The boosting of performance is moderate in the hysteretic NC-TFET. Second, we investigate the impact of the same NC booster on MOSFETs. Subthreshold swing as steep as 4 mV/decade with a 1.5-V hysteresis is obtained on a commercial device fabricated in 28-nm CMOS technology. Moreover, we demonstrate a non-hysteretic NC-MOSFET with a full matching of capacitances and a reduced subthreshold swing down to 20 mV/decade. |
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| 700 | 1 | _ | |a Jazaeri, Farzan |0 P:(DE-HGF)0 |b 1 |
| 700 | 1 | _ | |a Bellando, Francesco |0 P:(DE-HGF)0 |b 2 |
| 700 | 1 | _ | |a Stolichnov, Igor |0 P:(DE-HGF)0 |b 3 |
| 700 | 1 | _ | |a Luong, Gia V. |0 P:(DE-HGF)0 |b 4 |
| 700 | 1 | _ | |a Zhao, Qing-Tai |0 P:(DE-Juel1)128649 |b 5 |e Collaboration author |
| 700 | 1 | _ | |a Mantl, Siegfried |0 P:(DE-Juel1)128609 |b 6 |u fzj |
| 700 | 1 | _ | |a Enz, Christian C. |0 P:(DE-HGF)0 |b 7 |
| 700 | 1 | _ | |a Ionescu, Adrian M. |0 P:(DE-HGF)0 |b 8 |
| 773 | _ | _ | |a 10.1109/LED.2017.2734943 |g Vol. 38, no. 10, p. 1485 - 1488 |0 PERI:(DE-600)2034325-5 |n 10 |p 1485 - 1488 |t IEEE electron device letters |v 38 |y 2017 |x 1558-0563 |
| 856 | 4 | _ | |u https://juser.fz-juelich.de/record/859079/files/08000343.pdf |y Restricted |
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| 914 | 1 | _ | |y 2018 |
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