%0 Conference Paper
%A Liu, Linjie
%A Han, Qinghua
%A Makovejev, Sergej
%A Trellenkamp, Stefan
%A Raskin, Jean-Pierre
%A Mantl, Siegfried
%A Zhao, Qing-Tai
%T Analog and RF analysis of gate all around silicon nanowire MOSFETs
%C [Piscataway, NJ]
%I IEEE
%M FZJ-2019-00037
%@ 978-1-5090-5313-1 
%P 1-4
%D 2017
%X Gate all around (GAA) nanowire MOSFETs with gate length of 130 nm were fabricated on SOI wafers. The analog performance was analyzed in terms of transconductance, output conductance, voltage gain, Early voltage and transconductance efficiency. The RF characterization showed relatively low cutoff frequency and maximum oscillation frequency. Small-signal parameters are extracted using cold FET method combined with an optimization procedure called Artificial Bee Colony (ABC) method. It proves that large parasitic capacitance and high RF output conductance are the main reasons for the degraded RF performance.
%B 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
%C 3 Apr 2017 - 5 Apr 2017, Athens (Greece)
Y2 3 Apr 2017 - 5 Apr 2017
M2 Athens, Greece
%F PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
%9 Contribution to a conference proceedingsContribution to a book
%R 10.1109/ULIS.2017.7962575
%U https://juser.fz-juelich.de/record/859086