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024 | 7 | _ | |a 10.1109/ULIS.2017.7962584 |2 doi |
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100 | 1 | _ | |a Farokhnejad, A. |0 P:(DE-HGF)0 |b 0 |e Corresponding author |
111 | 2 | _ | |a 2017 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS) |c Athens |d 2017-04-03 - 2017-04-05 |w Greece |
245 | _ | _ | |a Compact modeling of intrinsic capacitances in Double-Gate Tunnel-FETs |
260 | _ | _ | |c 2017 |b IEEE |
300 | _ | _ | |a 1-4 |
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520 | _ | _ | |a In this paper a compact model for intrinsic capacitances for Tunnel field-effect transistors (TFETs) is presented. The model is derived from the carrier concentration and current flowing the channel of a Si Double-Gate (DG) n-type TFET. It represents a particularly good estimation of TFET capacitances and the flexibility of this model makes it possible to apply it for single-gate or p-type TFETs as well. To verify the model, the results are compared with TCAD Sentaurus simulations as well as measurement data. In both case model shows satisfying results. |
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700 | 1 | _ | |a Graef, M. |0 P:(DE-HGF)0 |b 1 |
700 | 1 | _ | |a Horst, F. |0 P:(DE-HGF)0 |b 2 |
700 | 1 | _ | |a Liu, C. |0 P:(DE-HGF)0 |b 3 |
700 | 1 | _ | |a Zhao, Q. T. |0 P:(DE-Juel1)128649 |b 4 |e Collaboration author |
700 | 1 | _ | |a Iniguez, B. |0 P:(DE-HGF)0 |b 5 |
700 | 1 | _ | |a Lime, F. |0 P:(DE-HGF)0 |b 6 |
700 | 1 | _ | |a Kloes, A. |0 P:(DE-HGF)0 |b 7 |
773 | _ | _ | |a 10.1109/ULIS.2017.7962584 |
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