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@INPROCEEDINGS{Radulovic:862393,
      author       = {Radulovic, Milan and Asifuzzaman, Kazi and Zivanovic, Darko
                      and Rajovic, Nikola and de Verdiere, Guillaume Colin and
                      Pleiter, Dirk and Marazakisl, Manolis and Kallimanis,
                      Nikolaos and Carpenter, Paul and Radojkovic, Petar and
                      Ayguade, Eduard},
      title        = {{M}ainstream vs. {E}merging {HPC}: {M}etrics,
                      {T}rade-{O}ffs and {L}essons {L}earned},
      publisher    = {IEEE},
      reportid     = {FZJ-2019-02721},
      pages        = {250-257},
      year         = {2018},
      comment      = {2018 30th International Symposium on Computer Architecture
                      and High Performance Computing (SBAC-PAD) : [Proceedings] -
                      IEEE, 2018. - ISBN 978-1-5386-7769-8 -
                      doi:10.1109/CAHPC.2018.8645891},
      booktitle     = {2018 30th International Symposium on
                       Computer Architecture and High
                       Performance Computing (SBAC-PAD) :
                       [Proceedings] - IEEE, 2018. - ISBN
                       978-1-5386-7769-8 -
                       doi:10.1109/CAHPC.2018.8645891},
      abstract     = {Various servers with different characteristics and
                      architectures are hitting the market, and their evaluation
                      and comparison in terms of HPC features is complex and
                      multidimensional. In this paper, we share our experience of
                      evaluating a diverse set of HPC systems, consisting of three
                      mainstream and five emerging architectures. We evaluate the
                      performance and power efficiency using prominent HPC
                      benchmarks, High-Performance Linpack (HPL) and High
                      Performance Conjugate Gradients (HPCG), and expand our
                      analysis using publicly available specialized kernel
                      benchmarks, targeting specific system components. In
                      addition to a large body of quantitative results, we
                      emphasize six usually overlooked aspects of the HPC
                      platforms evaluation, and share our conclusions and lessons
                      learned. Overall, we believe that this paper will improve
                      the evaluation and comparison of HPC platforms, making a
                      first step towards a more reliable and uniform methodology.},
      month         = {Sep},
      date          = {2018-09-24},
      organization  = {2018 30th International Symposium on
                       Computer Architecture and High
                       Performance Computing (SBAC-PAD), Lyon
                       (France), 24 Sep 2018 - 27 Sep 2018},
      cin          = {JSC},
      cid          = {I:(DE-Juel1)JSC-20090406},
      pnm          = {513 - Supercomputer Facility (POF3-513) / ExaNoDe -
                      European Exascale Processor Memory Node Design (671578)},
      pid          = {G:(DE-HGF)POF3-513 / G:(EU-Grant)671578},
      typ          = {PUB:(DE-HGF)8 / PUB:(DE-HGF)7},
      doi          = {10.1109/CAHPC.2018.8645891},
      url          = {https://juser.fz-juelich.de/record/862393},
}