000870376 001__ 870376
000870376 005__ 20230207130542.0
000870376 0247_ $$2CORDIS$$aG:(EU-Grant)826647$$d826647
000870376 0247_ $$2CORDIS$$aG:(EU-Call)H2020-SGA-LPMT-2018$$dH2020-SGA-LPMT-2018
000870376 0247_ $$2originalID$$acorda__h2020::826647
000870376 035__ $$aG:(EU-Grant)826647
000870376 150__ $$aSGA1 (Specific Grant Agreement 1) OF THE EUROPEAN PROCESSOR INITIATIVE (EPI)$$y2018-12-01 - 2021-12-31
000870376 371__ $$aAtomic Energy and Alternative Energies Commission$$bCEA$$dFrance$$ehttp://www.cea.fr/$$vCORDIS
000870376 371__ $$aChalmers University of Technology$$bChalmers University of Technology$$dSweden$$ehttp://www.chalmers.se/en/Pages/default.aspx$$vCORDIS
000870376 371__ $$aIDRYMA TECHNOLOGIAS KAI EREVNAS$$bFOUNDATION FOR RESEARCH AND TECHNOLOGYHELLAS$$dGreece$$ehttp://www.forth.gr$$vCORDIS
000870376 371__ $$aFRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.$$bFraunhofer$$dGermany$$ehttp://www.fraunhofer.de$$vCORDIS
000870376 371__ $$aBULL SAS$$bBULL$$dFrance$$ehttp://www.bull.com$$vCORDIS
000870376 371__ $$aSwiss Federal Institute of Technology in Zurich$$bSwiss Federal Institute of Technology in Zurich$$dSwitzerland$$ehttps://www.ethz.ch/en.html$$vCORDIS
000870376 371__ $$aSURFSARA BV$$dNetherlands$$ehttp://www.sara.nl$$vCORDIS
000870376 371__ $$aKarlsruher Institut für Technologie$$bKIT$$dGermany$$ehttp://www.kit.edu$$vCORDIS
000870376 371__ $$aCINECA CONSORZIO INTERUNIVERSITARIO$$bCINECA$$dItaly$$ehttp://www.cineca.it$$vCORDIS
000870376 371__ $$aEXTOLL GMBH$$dGermany$$ehttp://www.extoll.de$$vCORDIS
000870376 371__ $$aSEMIDYNAMICS TECHNOLOGY SERVICES SL$$bSEMIDYNAMICS$$dSpain$$ehttp://www.semidynamics.com$$vCORDIS
000870376 371__ $$aE4 COMPUTER ENGINEERING SPA$$bE4$$dItaly$$ehttp://www.e4company.com$$vCORDIS
000870376 371__ $$aSIPEARL$$dFrance$$ehttp://www.sipearl.com$$vCORDIS
000870376 371__ $$aPROVE&RUN$$bProve & Run$$dFrance$$ehttp://www.provenrun.com$$vCORDIS
000870376 371__ $$aMENTA SAS$$dFrance$$ehttp://www.menta-efpga.com$$vCORDIS
000870376 371__ $$aINSTITUTO SUPERIOR TECNICO$$bIST$$dPortugal$$ehttp://www.tecnico.ulisboa.pt$$vCORDIS
000870376 371__ $$aSVEUCILISTE U ZAGREBU FAKULTET ELEKTROTEHNIKE I RACUNARSTVA$$bUNIZG-FER$$dCroatia$$ehttp://www.fer.unizg.hr$$vCORDIS
000870376 371__ $$aUniversity of Pisa$$bUniPi$$dItaly$$ehttp://www.unipi.it/$$vCORDIS
000870376 371__ $$aELEKTROBIT AUTOMOTIVE GMBH$$dGermany$$vCORDIS
000870376 371__ $$aInfineon Technologies (Germany)$$bInfineon Technologies (Germany)$$dGermany$$ehttps://www.infineon.com/$$vCORDIS
000870376 371__ $$aGrand Equipement National de Calcul Intensif (France)$$bGENCI$$dFrance$$ehttp://www.genci.fr/fr?lang=en$$vCORDIS
000870376 371__ $$aKALRAY SA$$bKALRAY$$dFrance$$ehttp://www.kalray.eu$$vCORDIS
000870376 371__ $$aUniversity of Bologna$$bUNIBO$$dItaly$$ehttp://www.unibo.it/en/homepage$$vCORDIS
000870376 371__ $$aForschungszentrum Jülich$$bForschungszentrum Jülich$$dGermany$$ehttps://www.ptj.de/$$vCORDIS
000870376 371__ $$aBAYERISCHE MOTOREN WERKE AKTIENGESELLSCHAFT$$bBMW GROUP$$dGermany$$vCORDIS
000870376 371__ $$aSTMICROELECTRONICS SRL$$dItaly$$ehttp://www.st.com$$vCORDIS
000870376 371__ $$aBARCELONA SUPERCOMPUTING CENTER - CENTRO NACIONAL DE SUPERCOMPUTACION$$bBSC$$dSpain$$ehttp://www.bsc.es$$vCORDIS
000870376 372__ $$aH2020-SGA-LPMT-2018$$s2018-12-01$$t2021-12-31
000870376 450__ $$aEPI SGA1$$wd$$y2018-12-01 - 2021-12-31
000870376 5101_ $$0I:(DE-588b)5098525-5$$2CORDIS$$aEuropean Union
000870376 680__ $$aThe EPI SGA1 project will be the first phase of the European Processor Initiative FPA, whose aim is to design and implement a roadmap for a new family of low-power European processors for extreme scale computing, high-performance Big-Data and a range of emerging applications. EPI SGA1 will:
- Develop the roadmap for the full length of the EPI initiative
- Develop the first generation of technologies through a co-design approach (IPs for general-purpose HPC processors, for accelerators, for trusted chips, software stacks and boards) 
- Tape-out of the first generation chip by integrating the IPs developed
- Validate this chip in the HPC context and in the automotive context using a demonstration platform
The project will deliver a high performance, low power processor, implementing vector instructions and specific accelerators with high bandwidth memory access. The EPI processor will also meet high security and safety requirements. This will be achieved through intensive use of simulation, development of a complete software stack and tape-out in the most advanced semiconductor process node. SGA1 will provide a competitive chip that can effectively address the requirements of the HPC, AI, automotive and trusted IT infrastructure markets.
000870376 909CO $$ooai:juser.fz-juelich.de:870376$$pauthority$$pauthority:GRANT
000870376 970__ $$aoai:dnet:corda__h2020::b37ce4a3bb5cdec008e05aa811e961f4
000870376 980__ $$aG
000870376 980__ $$aCORDIS
000870376 980__ $$aAUTHORITY