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000872901 037__ $$aFZJ-2020-00366
000872901 041__ $$aEnglish
000872901 1001_ $$0P:(DE-Juel1)144441$$aPleiter, Dirk$$b0$$eCorresponding author$$ufzj
000872901 1112_ $$aIndo-German Workshop on Computational Mathematics$$cBangalore$$d2019-12-02 - 2019-12-04$$wIndia
000872901 245__ $$aComputer Architectures and Technologies towards Exascale
000872901 260__ $$c2019
000872901 3367_ $$033$$2EndNote$$aConference Paper
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000872901 3367_ $$0PUB:(DE-HGF)6$$2PUB:(DE-HGF)$$aConference Presentation$$bconf$$mconf$$s1579527025_30847$$xPlenary/Keynote
000872901 520__ $$aThe evolution of supercomputing architectures and technologies towardsexascale is dictated by constraints of the underlying technologiesas well as the markets driving these technologies. From a technicalperspective, reaching next performance levels will, in particular, becomemore difficult due to power constraints and the related challenge ofmaintaining a balance of processing and data transport capabilities. As aconsequence, the hardware architectures become more complex and availablesolutions more diverse. We will present an assessment of the evolutionof supercomputing architectures and technologies with focus on Europeandevelopments. On this basis we will discuss the impact on developmentof numerical algorithms and applications for being able to exploitfuture exascale architectures efficiently while keeping the softwarebasis maintainable and enabling modifications according to evolvingscientific needs.
000872901 536__ $$0G:(DE-HGF)POF3-513$$a513 - Supercomputer Facility (POF3-513)$$cPOF3-513$$fPOF III$$x0
000872901 536__ $$0G:(EU-Grant)801101$$aMAESTRO - Middleware for memory and data-awareness in workflows (801101)$$c801101$$fH2020-FETHPC-2017$$x1
000872901 8564_ $$uhttps://juser.fz-juelich.de/record/872901/files/igcm-20191204-pleiter.pdf$$yOpenAccess
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000872901 9141_ $$y2019
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