TY  - CONF
AU  - Degenhardt, C.
AU  - Artanov, A.
AU  - Geck, L.
AU  - Grewing, C.
AU  - Kruth, A.
AU  - Nielinger, D.
AU  - Vliex, P.
AU  - Zambanini, A.
AU  - van Waasen, S.
TI  - Systems Engineering of Cryogenic CMOS Electronics for Scalable Quantum Computers
PB  - IEEE
M1  - FZJ-2020-00914
SP  - 1 - 5
PY  - 2019
AB  - We report on our systems engineering activities concerning cryogenic CMOS electronics as building blocks for scalable quantum computers. Following the V-model of engineering, the topic is approached both in top-down and in bottom-up fashion. We show the main results from the top-down study using system modeling and simulations. In a bottom-up fashion, a prototype chip was designed and implemented in a commercial 65nm CMOS process. The chip contains a DC digital-to-analog-converter (DC-DAC) and a Pulse-DAC as building blocks for an integrated quantum bit control. The DC-DAC is able to tune a qubit into its operating point. The Pulse-DAC generates pulse patterns with 250MHz sampling frequency to perform gate operations on a qubit.
T2  - 2019 IEEE International Symposium on Circuits and Systems (ISCAS)
CY  - 26 May 2019 - 29 May 2019, Sapporo (Japan)
Y2  - 26 May 2019 - 29 May 2019
M2  - Sapporo, Japan
LB  - PUB:(DE-HGF)8
DO  - DOI:10.1109/ISCAS.2019.8702442
UR  - https://juser.fz-juelich.de/record/873691
ER  -