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@INPROCEEDINGS{Degenhardt:873691,
author = {Degenhardt, C. and Artanov, A. and Geck, L. and Grewing, C.
and Kruth, A. and Nielinger, D. and Vliex, P. and Zambanini,
A. and van Waasen, S.},
title = {{S}ystems {E}ngineering of {C}ryogenic {CMOS} {E}lectronics
for {S}calable {Q}uantum {C}omputers},
publisher = {IEEE},
reportid = {FZJ-2020-00914},
pages = {1 - 5},
year = {2019},
abstract = {We report on our systems engineering activities concerning
cryogenic CMOS electronics as building blocks for scalable
quantum computers. Following the V-model of engineering, the
topic is approached both in top-down and in bottom-up
fashion. We show the main results from the top-down study
using system modeling and simulations. In a bottom-up
fashion, a prototype chip was designed and implemented in a
commercial 65nm CMOS process. The chip contains a DC
digital-to-analog-converter (DC-DAC) and a Pulse-DAC as
building blocks for an integrated quantum bit control. The
DC-DAC is able to tune a qubit into its operating point. The
Pulse-DAC generates pulse patterns with 250MHz sampling
frequency to perform gate operations on a qubit.},
month = {May},
date = {2019-05-26},
organization = {2019 IEEE International Symposium on
Circuits and Systems (ISCAS), Sapporo
(Japan), 26 May 2019 - 29 May 2019},
cin = {ZEA-2},
cid = {I:(DE-Juel1)ZEA-2-20090406},
pnm = {524 - Controlling Collective States (POF3-524)},
pid = {G:(DE-HGF)POF3-524},
typ = {PUB:(DE-HGF)8},
doi = {10.1109/ISCAS.2019.8702442},
url = {https://juser.fz-juelich.de/record/873691},
}