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000878386 0247_ $$2ISSN$$a1866-1777
000878386 020__ $$a978-3-95806-489-8
000878386 037__ $$aFZJ-2020-02822
000878386 041__ $$aEnglish
000878386 1001_ $$0P:(DE-Juel1)162362$$aMuralidharan, Pavithra$$b0$$eCorresponding author$$gfemale$$ufzj
000878386 245__ $$aDigital Signal Processing and Mixed Signal Control of Receiver Circuitry for Large-Scale Particle Detectors$$f- 2020-08-13
000878386 260__ $$aJülich$$bForschungszentrum Jülich GmbH Zentralbibliothek, Verlag$$c2020
000878386 300__ $$axv, 109 S.
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000878386 4900_ $$aSchriften des Forschungszentrums Jülich. Reihe Information / Information$$v61
000878386 502__ $$aUniversität Duisburg, Diss., 2019$$bDissertation$$cUniversität Duisburg$$d2019
000878386 520__ $$aThe Jiangmen Underground Neutrino Observatory (JUNO) is a multi-purpose underground experiment based on a 20,000 ton liquid scintillator with the primary objective of determining the neutrino mass hierarchy. The signal detection is performed by photomultipliers PMT and integrated readout electronics. The central component for the digitization process is a receiver chip with a low power analog to digital conversion unit of large dynamic range. In order to efficiently utilize the conversion unit’s dynamic range, a custom data processor and a regulation circuit were included in the chip. In this thesis, the design, development and prototype measurements of the data processing unit and a regulation circuit included in the analog to digital conversion unit are presented. The processor analyzes the data and performsd ata reduction resulting in efficient utilization of output bandwidth. Based on the systemand event information transmitted by the processor along with the data, successful signal reconstruction was carried out. The regulation circuit reduces the noise level thereby increasing the effective number of bits available for the signal. The complexity of the PMT installation poses difficulty to replace faulty electronics during runtime of the experiment. A design for test structure included in the receiver chip with the intention to extract defect free electronics during testing of the mass-produced chips is also described. The introduction of test structures in the design successfully increased the overall test coverage. Finally, the insights from the developed model of the receiver chain are presented.
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