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@ARTICLE{Siegel:888291,
      author       = {Siegel, Sebastian and Baeumer, Christoph and Gutsche,
                      Alexander and Witzleben, Moritz and Waser, R. and Menzel,
                      Stephan and Dittmann, Regina},
      title        = {{T}rade‐{O}ff {B}etween {D}ata {R}etention and
                      {S}witching {S}peed in {R}esistive {S}witching {R}e{RAM}
                      {D}evices},
      journal      = {Advanced electronic materials},
      volume       = {7},
      number       = {1},
      issn         = {2199-160X},
      address      = {Weinheim},
      publisher    = {Wiley-VCH Verlag GmbH $\&$ Co. KG},
      reportid     = {FZJ-2020-04817},
      pages        = {2000815},
      year         = {2021},
      abstract     = {Memristive switching devices are promising for future data
                      storage and neuromorphic computing applications to overcome
                      the scaling and power dissipation limits of classical CMOS
                      technology. Many groups have engineered bilayer oxide
                      structures to enhance the switching performance especially
                      in terms of retention and device reliability. Here,
                      introducing retention enhancement oxide layers into the
                      memristive stack is shown to result in a reduction of the
                      switching speed not only by changing the voltage and
                      temperature distribution in the cell, but also by
                      influencing the rate‐limiting‐step of the switching
                      kinetics. In particular, it is demonstrated that by
                      introducing a retention enhancement layer into resistive
                      switching SrTiO3 devices, the kinetics are no longer
                      determined by the interface exchange reaction between
                      switching oxide and active electrode, but depend on the
                      oxygen ion migration in the additional interface layer.
                      Thus, the oxygen migration barrier in the additional layer
                      determines the switching speed. This trade‐off between
                      retention and switching speed is of general importance for
                      rational engineering of memristive devices.},
      cin          = {PGI-7 / PGI-10},
      ddc          = {621.3},
      cid          = {I:(DE-Juel1)PGI-7-20110106 / I:(DE-Juel1)PGI-10-20170113},
      pnm          = {5233 - Memristive Materials and Devices (POF4-523) /
                      Advanced Computing Architectures $(aca_20190115)$ /
                      Verbundprojekt: Neuro-inspirierte Technologien der
                      künstlichen Intelligenz für die Elektronik der Zukunft -
                      NEUROTEC -, Teilvorhaben: Forschungszentrum Jülich
                      (16ES1133K) / DFG project 167917811 - SFB 917: Resistiv
                      schaltende Chalkogenide für zukünftige
                      Elektronikanwendungen: Struktur, Kinetik und
                      Bauelementskalierung "Nanoswitches" (167917811)},
      pid          = {G:(DE-HGF)POF4-5233 / $G:(DE-Juel1)aca_20190115$ /
                      G:(BMBF)16ES1133K / G:(GEPRIS)167917811},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000594730200001},
      doi          = {10.1002/aelm.202000815},
      url          = {https://juser.fz-juelich.de/record/888291},
}