% IMPORTANT: The following is UTF-8 encoded. This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.
@ARTICLE{Xi:893202,
author = {Xi, Fengben and Han, Yi and Liu, Mingshan and Bae, Jin Hee
and Tiedemann, Andreas and Grützmacher, Detlev and Zhao,
Qing-Tai},
title = {{A}rtificial {S}ynapses {B}ased on {F}erroelectric
{S}chottky {B}arrier {F}ield-{E}ffect {T}ransistors for
{N}euromorphic {A}pplications},
journal = {ACS applied materials $\&$ interfaces},
volume = {13},
number = {27},
issn = {1944-8244},
address = {Washington, DC},
publisher = {Soc.},
reportid = {FZJ-2021-02619},
pages = {32005-32012},
year = {2021},
abstract = {Artificial synapses based on ferroelectric Schottky barrier
field-effect transistors (FE-SBFETs) are experimentally
demonstrated. The FE-SBFETs employ single-crystalline NiSi2
contacts with an atomically flat interface to Si and
Hf0.5Zr0.5O2 ferroelectric layers on silicon-on-insulator
substrates. The ferroelectric polarization switching
dynamics gradually modulate the NiSi2/Si Schottky barriers
and the potential of the channel, thus programming the
device conductance with input voltage pulses. The short-term
synaptic plasticity is characterized in terms of
excitatory/inhibitory post-synaptic current (EPSC) and
paired-pulse facilitation/depression. The EPSC amplitude
shows a linear response to the amplitude of the pre-synaptic
spike. Very low energy/spike consumption as small as ∼2 fJ
is achieved, demonstrating high energy efficiency. Long-term
potentiation/depression results show very high endurance and
very small cycle-to-cycle variations $(∼1\%)$ after 105
pulse measurements. Furthermore, spike-timing-dependent
plasticity is also emulated using the gate voltage pulse as
the pre-synaptic spike and the drain voltage pulse as the
post-synaptic spikes. These findings indicate that FE-SBFET
synapses have high potential for future neuromorphic
computing applications.},
cin = {PGI-9},
ddc = {600},
cid = {I:(DE-Juel1)PGI-9-20110106},
pnm = {5234 - Emerging NC Architectures (POF4-523) / DFG project
422581876 - Kryogene CMOS Technologie für die Realisierung
von von klassischen QuBit-Kontrollschaltkreisen},
pid = {G:(DE-HGF)POF4-5234 / G:(GEPRIS)422581876},
typ = {PUB:(DE-HGF)16},
pubmed = {34171195},
UT = {WOS:000674333400067},
doi = {10.1021/acsami.1c07505},
url = {https://juser.fz-juelich.de/record/893202},
}