Gast ::
| Hauptseite > Publikationsdatenbank > Qubit Gate Quality Loss Through Circuit Parasitics and Noise |
| Hauptseite > Publikationsdatenbank > Qubit Gate Quality Loss Through Circuit Parasitics and Noise |
| Contribution to a conference proceedings | FZJ-2021-03536 |
;
2021
Abstract: This work aims to find signal sequences that implementhigh-quality logic gates for single GaAs qubits in a quantumcomputer. To achieve that an optimization of the gate quality witha scalable electronic architecture in mind is done. In addition, abehavioral model of the qubit and the control electronics in the QInterfaceis implemented. The electronic model includes typicalintegrated circuit impairments such as process variations andparasitic capacitors. While the initial quality of the optimizedgates is high, simulations with the implemented model showpartly large quality reductions for some impairments. A majorquality loss is for example caused by parasitic capacitors, butsome non-ideal effects can be mitigated through pre-distortion,among others.
|
The record appears in these collections: |
