% IMPORTANT: The following is UTF-8 encoded.  This means that in the presence
% of non-ASCII characters, it will not work with BibTeX 0.99 or older.
% Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or
% “biber”.

@ARTICLE{Poehls:902086,
      author       = {Poehls, L. M. Bolzani and Fieback, M. C. R. and
                      Hoffmann-Eifert, S. and Copetti, T. and Brum, E. and Menzel,
                      Stephan and Hamdioui, S. and Gemmeke, T.},
      title        = {{R}eview of {M}anufacturing {P}rocess {D}efects and {T}heir
                      {E}ffects on {M}emristive {D}evices},
      journal      = {Journal of electronic testing},
      volume       = {47},
      issn         = {1573-0727},
      address      = {Dordrecht [u.a.]},
      publisher    = {Springer Science + Business Media B.V},
      reportid     = {FZJ-2021-04026},
      pages        = {1},
      year         = {2021},
      abstract     = {Complementary Metal Oxide Semiconductor (CMOS) technology
                      has been scaled down over the last forty years making
                      possible the design of high-performance applications,
                      following the predictions made by Gordon Moore and Robert H.
                      Dennard in the 1970s. However, there is a growing concern
                      that device scaling, while maintaining cost-effective
                      production, will become infeasible below a certain feature
                      size. In parallel, emerging applications including
                      Internet-of-Things (IoT) and big data applications present
                      high demands in terms of storage and computing capability,
                      combined with challenging constraints in terms of size,
                      power consumption and response latency. In this scenario,
                      memristive devices have become promising candidates to
                      complement the CMOS technology due to their CMOS
                      manufacturing process compatibility, great scalability and
                      high density, zero standby power consumption and their
                      capacity to implement high density memories as well as new
                      computing paradigms. Despite these advantages, memristive
                      devices are also susceptible to manufacturing defects that
                      may cause unique faulty behaviors that are not seen in CMOS,
                      increasing significantly the complexity of test procedures.
                      This paper provides a review about the manufacturing process
                      of memristives devices, focusing on Valence Change Mechanism
                      (VCM)-based memristive devices, and a comparative analysis
                      of the CMOS and memristive device manufacturing processes.
                      Moreover, this paper identifies possible manufacturing
                      failure mechanisms that may affect these novel devices,
                      completing the list of the already known mechanisms, and
                      provides a discussion about possible faulty behaviors. Note
                      that the identification of these mechanisms provides
                      insights regarding the possible memristive devices’
                      defective behaviors, enabling to derive more accurate fault
                      models and consequently, more suitable test procedures.},
      cin          = {PGI-7 / JARA-FIT / PGI-10},
      ddc          = {670},
      cid          = {I:(DE-Juel1)PGI-7-20110106 / $I:(DE-82)080009_20140620$ /
                      I:(DE-Juel1)PGI-10-20170113},
      pnm          = {5233 - Memristive Materials and Devices (POF4-523) /
                      Verbundprojekt: Neuro-inspirierte Technologien der
                      künstlichen Intelligenz für die Elektronik der Zukunft -
                      NEUROTEC -, Teilvorhaben: Forschungszentrum Jülich
                      (16ES1133K)},
      pid          = {G:(DE-HGF)POF4-5233 / G:(BMBF)16ES1133K},
      typ          = {PUB:(DE-HGF)16},
      UT           = {WOS:000709238700001},
      doi          = {10.1007/s10836-021-05968-8},
      url          = {https://juser.fz-juelich.de/record/902086},
}