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@ARTICLE{Kleijnen:908049,
author = {Kleijnen, Robert and Robens, Markus and Schiek, Michael and
van Waasen, Stefan},
title = {{A} {N}etwork {S}imulator for the {E}stimation of
{B}andwidth {L}oad and {L}atency {C}reated by
{H}eterogeneous {S}piking {N}eural {N}etworks on
{N}euromorphic {C}omputing {C}ommunication {N}etworks},
journal = {Journal of Low Power Electronics and Applications},
volume = {12},
number = {2},
issn = {2079-9268},
address = {Basel},
publisher = {MDPI},
reportid = {FZJ-2022-02346},
pages = {23 -},
year = {2022},
abstract = {Accelerated simulations of biological neural networks are
in demand to discover the principals of biological learning.
Novel many-core simulation platforms, e.g., SpiNNaker,
BrainScaleS and Neurogrid, allow one to study neuron
behavior in the brain at an accelerated rate, with a high
level of detail. However, they do not come anywhere near
simulating the human brain. The massive amount of spike
communication has turned out to be a bottleneck. We
specifically developed a network simulator to analyze in
high detail the network loads and latencies caused by
different network topologies and communication protocols in
neuromorphic computing communication networks. This
simulator allows simulating the impacts of heterogeneous
neural networks and evaluating neuron mapping algorithms,
which is a unique feature among state-of-the-art network
models and simulators. The simulator was cross-checked by
comparing the results of a homogeneous neural network-based
run with corresponding bandwidth load results from
comparable works. Additionally, the increased level of
detail achieved by the new simulator is presented. Then, we
show the impact heterogeneous connectivity can have on the
network load, first for a small-scale test case, and later
for a large-scale test case, and how different neuron
mapping algorithms can influence this effect. Finally, we
look at the latency estimations performed by the simulator
for different mapping algorithms, and the impact of the node
size.},
cin = {ZEA-2},
ddc = {530},
cid = {I:(DE-Juel1)ZEA-2-20090406},
pnm = {5234 - Emerging NC Architectures (POF4-523) / ACA -
Advanced Computing Architectures (SO-092)},
pid = {G:(DE-HGF)POF4-5234 / G:(DE-HGF)SO-092},
typ = {PUB:(DE-HGF)16},
UT = {WOS:000817696700001},
doi = {10.3390/jlpea12020023},
url = {https://juser.fz-juelich.de/record/908049},
}