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| Hauptseite > Publikationsdatenbank > GeSn Vertical Gate-all-around Nanowire n-type MOSFETs > print |
| 001 | 910085 | ||
| 005 | 20221027130516.0 | ||
| 037 | _ | _ | |a FZJ-2022-03604 |
| 041 | _ | _ | |a English |
| 100 | 1 | _ | |a Junk, Yannik |0 P:(DE-Juel1)185010 |b 0 |e Corresponding author |u fzj |
| 111 | 2 | _ | |a IEEE 52nd European Solid State Device Research Conference |g ESSDERC |c Milan |d 2022-09-19 - 2022-09-22 |w Italy |
| 245 | _ | _ | |a GeSn Vertical Gate-all-around Nanowire n-type MOSFETs |
| 260 | _ | _ | |c 2022 |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
| 336 | 7 | _ | |a Other |2 DataCite |
| 336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a LECTURE_SPEECH |2 ORCID |
| 336 | 7 | _ | |a Conference Presentation |b conf |m conf |0 PUB:(DE-HGF)6 |s 1666867787_21995 |2 PUB:(DE-HGF) |x Panel discussion |
| 520 | _ | _ | |a Vertical GeSn gate-all-around (GAA) nanowire nMOSFETs fabricated using a top-down approach are presented. The devices are benchmarked with similar Ge and Ge/GeSn/Ge heterostructure devices to underline the great potential of GeSn for future nMOS devices. Device measurements are performed in the temperature range from 12 K to room temperature (RT, 300 K). At RT the all-GeSn n-MOSFETs show a subthreshold swing (SS) of ~120 mV/dec that decreases at cryogenic temperatures to a very steep 20mV/dec. The abrupt transition from subthreshold to on-state shows the suitability of GeSn alloys for cryogenic CMOS applications. |
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| 700 | 1 | _ | |a Concepción Díaz, Omar |0 P:(DE-Juel1)188576 |b 3 |u fzj |
| 700 | 1 | _ | |a Bae, Jin Hee |0 P:(DE-Juel1)177006 |b 4 |u fzj |
| 700 | 1 | _ | |a Hartmann, Jean-Michel |0 P:(DE-HGF)0 |b 5 |
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| 700 | 1 | _ | |a Zhao, Qing-Tai |0 P:(DE-Juel1)128649 |b 8 |u fzj |
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| 914 | 1 | _ | |y 2022 |
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