guest ::
| Home > Publications database > Vertical GeSn/Ge Heterostructure Gate-All-Around Nanowire p-MOSFETs > print |
| Home > Publications database > Vertical GeSn/Ge Heterostructure Gate-All-Around Nanowire p-MOSFETs > print |
| 001 | 910086 | ||
| 005 | 20221027130516.0 | ||
| 037 | _ | _ | |a FZJ-2022-03605 |
| 041 | _ | _ | |a English |
| 100 | 1 | _ | |a Junk, Yannik |0 P:(DE-Juel1)185010 |b 0 |e Corresponding author |
| 111 | 2 | _ | |a 241st ECS Meeting |c Vancouver |d 2022-05-29 - 2022-06-02 |w Canada |
| 245 | _ | _ | |a Vertical GeSn/Ge Heterostructure Gate-All-Around Nanowire p-MOSFETs |
| 260 | _ | _ | |c 2022 |
| 336 | 7 | _ | |a Conference Paper |0 33 |2 EndNote |
| 336 | 7 | _ | |a Other |2 DataCite |
| 336 | 7 | _ | |a INPROCEEDINGS |2 BibTeX |
| 336 | 7 | _ | |a conferenceObject |2 DRIVER |
| 336 | 7 | _ | |a LECTURE_SPEECH |2 ORCID |
| 336 | 7 | _ | |a Conference Presentation |b conf |m conf |0 PUB:(DE-HGF)6 |s 1666867801_25413 |2 PUB:(DE-HGF) |x Panel discussion |
| 520 | _ | _ | |a A process for the fabrication of vertical gate-all-around (GAA) nanowire p-FETs with diameters of down to 20 nm based on Ge and GeSn/Ge-heterostructures is presented. The resulting Ge-based devices exhibit a low subthreshold slope (SS) of 66 mV/dec, a low drain-induced barrier lowering of 35 mV/V and an Ion/Ioff-ratio of 2.1×10^6 for devices with a diameter of 20 nm. Using a GeSn/Ge-heterostructure with GeSn as the top layer and source of the device, the on-current was increased by ~32%. With these results the high potential of incorporation of GeSn into Ge-MOSFET technology is demonstrated. |
| 536 | _ | _ | |a 5234 - Emerging NC Architectures (POF4-523) |0 G:(DE-HGF)POF4-5234 |c POF4-523 |f POF IV |x 0 |
| 700 | 1 | _ | |a Liu, Mingshan |0 P:(DE-HGF)0 |b 1 |
| 700 | 1 | _ | |a Frauenrath, Marvin |0 P:(DE-HGF)0 |b 2 |
| 700 | 1 | _ | |a Hartmann, Jean-Michel |0 P:(DE-HGF)0 |b 3 |
| 700 | 1 | _ | |a Grützmacher, Detlev |0 P:(DE-Juel1)125588 |b 4 |
| 700 | 1 | _ | |a Buca, Dan Mihai |0 P:(DE-Juel1)125569 |b 5 |
| 700 | 1 | _ | |a Zhao, Qing-Tai |0 P:(DE-Juel1)128649 |b 6 |
| 909 | C | O | |o oai:juser.fz-juelich.de:910086 |p VDB |
| 910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 0 |6 P:(DE-Juel1)185010 |
| 910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 1 |6 P:(DE-HGF)0 |
| 910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 4 |6 P:(DE-Juel1)125588 |
| 910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 5 |6 P:(DE-Juel1)125569 |
| 910 | 1 | _ | |a Forschungszentrum Jülich |0 I:(DE-588b)5008462-8 |k FZJ |b 6 |6 P:(DE-Juel1)128649 |
| 913 | 1 | _ | |a DE-HGF |b Key Technologies |l Natural, Artificial and Cognitive Information Processing |1 G:(DE-HGF)POF4-520 |0 G:(DE-HGF)POF4-523 |3 G:(DE-HGF)POF4 |2 G:(DE-HGF)POF4-500 |4 G:(DE-HGF)POF |v Neuromorphic Computing and Network Dynamics |9 G:(DE-HGF)POF4-5234 |x 0 |
| 914 | 1 | _ | |y 2022 |
| 920 | 1 | _ | |0 I:(DE-Juel1)PGI-9-20110106 |k PGI-9 |l Halbleiter-Nanoelektronik |x 0 |
| 980 | _ | _ | |a conf |
| 980 | _ | _ | |a VDB |
| 980 | _ | _ | |a I:(DE-Juel1)PGI-9-20110106 |
| 980 | _ | _ | |a UNRESTRICTED |
| Library | Collection | CLSMajor | CLSMinor | Language | Author |
|---|