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@INPROCEEDINGS{Junk:910087,
      author       = {Junk, Yannik and Frauenrath, Marvin and Han, Yi and
                      Concepción Díaz, Omar and Bae, Jin Hee and Hartmann,
                      Jean-Michel and Grützmacher, Detlev and Buca, Dan Mihai and
                      Zhao, Qing-Tai},
      title        = {{G}e{S}n {V}ertical {G}ate-all-around {N}anowire n-type
                      {MOSFET}s},
      reportid     = {FZJ-2022-03606},
      pages        = {364-367},
      year         = {2022},
      abstract     = {Vertical GeSn gate-all-around (GAA) nanowire nMOSFETs
                      fabricated using a top-down approach are presented. The
                      devices are benchmarked with similar Ge and Ge/GeSn/Ge
                      heterostructure devices to underline the great potential of
                      GeSn for future nMOS devices. Device measurements are
                      performed in the temperature range from 12 K to room
                      temperature (RT, 300 K). At RT the all-GeSn n-MOSFETs show a
                      subthreshold swing (SS) of ~120 mV/dec that decreases at
                      cryogenic temperatures to a very steep 20mV/dec. The abrupt
                      transition from subthreshold to on-state shows the
                      suitability of GeSn alloys for cryogenic CMOS applications.},
      month         = {Sep},
      date          = {2022-09-19},
      organization  = {IEEE 52nd European Solid State Device
                       Research Conference, Milan (Italy), 19
                       Sep 2022 - 22 Sep 2022},
      cin          = {PGI-9},
      cid          = {I:(DE-Juel1)PGI-9-20110106},
      pnm          = {5234 - Emerging NC Architectures (POF4-523)},
      pid          = {G:(DE-HGF)POF4-5234},
      typ          = {PUB:(DE-HGF)8},
      url          = {https://juser.fz-juelich.de/record/910087},
}