% IMPORTANT: The following is UTF-8 encoded. This means that in the presence % of non-ASCII characters, it will not work with BibTeX 0.99 or older. % Instead, you should use an up-to-date BibTeX implementation like “bibtex8” or % “biber”. @ARTICLE{Freye:912510, author = {Freye, Florian and Lou, Jie and Bengel, Christopher and Menzel, Stephan and Wiefels, Stefan and Gemmeke, Tobias}, title = {{M}emristive {D}evices for {T}ime {D}omain {C}ompute-in-{M}emory}, journal = {IEEE journal on exploratory solid-state computational devices and circuits}, volume = {8}, number = {2}, issn = {2329-9231}, address = {New York, NY}, publisher = {IEEE}, reportid = {FZJ-2022-05683}, pages = {119 - 127}, year = {2022}, abstract = {Analog compute schemes and compute-in-memory (CIM) have emerged in an effort to reduce the increasing power hunger of convolutional neural networks (CNNs), which exceeds the constraints of edge devices. Memristive device types are a relatively new offering with interesting opportunities for unexplored circuit concepts. In this work, the use of memristive devices in cascaded time-domain CIM (TDCIM) is introduced with the primary goal of reducing the size of fully unrolled architectures. The different effects influencing the determinism in memristive devices are outlined together with reliability concerns. Architectures for binary as well as multibit multiply and accumulate (MAC) cells are presented and evaluated. As more involved circuits offer more accurate compute result, a tradeoff between design effort and accuracy comes into the picture. To further evaluate this tradeoff, the impact of variations on overall compute accuracy is discussed. The presented cells reach an energy/OP of 0.23 fJ at a size of 1.2 μm2 for binary and 6.04 fJ at 3.2 μm2 for 4×4 bit MAC operations.}, cin = {PGI-7 / JARA-FIT}, ddc = {530}, cid = {I:(DE-Juel1)PGI-7-20110106 / $I:(DE-82)080009_20140620$}, pnm = {5233 - Memristive Materials and Devices (POF4-523) / BMBF-16ME0399 - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0399) / BMBF-16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K)}, pid = {G:(DE-HGF)POF4-5233 / G:(DE-82)BMBF-16ME0399 / G:(DE-82)BMBF-16ME0398K}, typ = {PUB:(DE-HGF)16}, UT = {WOS:000915312400008}, doi = {10.1109/JXCDC.2022.3217098}, url = {https://juser.fz-juelich.de/record/912510}, }