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@ARTICLE{Bengel:972102,
      author       = {Bengel, Christopher and Zhang, Kaihua and Mohr, Johannes
                      and Ziegler, Tobias and Wiefels, Stefan and Waser, R. and
                      Wouters, Dirk and Menzel, Stephan},
      title        = {{T}ailor-made synaptic dynamics based on memristive
                      devices},
      journal      = {Frontiers in electronic materials},
      volume       = {3},
      issn         = {2673-9895},
      address      = {Lausanne},
      publisher    = {Frontiers Media},
      reportid     = {FZJ-2023-01070},
      pages        = {1061269},
      year         = {2023},
      abstract     = {The proliferation of machine learning algorithms in
                      everyday applications such as image recognition or language
                      translation has increased the pressure to adapt underlying
                      computing architectures towards these algorithms.
                      Application specific integrated circuits (ASICs) such as the
                      Tensor Processing Units by Google, Hanguang by Alibaba or
                      Inferentia by Amazon Web Services were designed specifically
                      for machine learning algorithms and have been able to
                      outperform CPU based solutions by great margins during
                      training and inference. As newer generations of chips allow
                      handling of and computation on more and more data, the size
                      of neural networks has dramatically increased, while the
                      challenges they are trying to solve have become more
                      complex. Neuromorphic computing tries to take inspiration
                      from biological information processing systems, aiming to
                      further improve the efficiency with which these networks can
                      be trained or the inference can be performed. Enhancing
                      neuromorphic computing architectures with memristive devices
                      as non-volatile storage elements could potentially allow for
                      even higher energy efficiencies. Their ability to mimic
                      synaptic plasticity dynamics brings neuromorphic
                      architectures closer to the biological role models. So far,
                      memristive devices are mainly investigated for the emulation
                      of the weights of neural networks during training and
                      inference as their non-volatility would enable both
                      processes in the same location without data transfer. In
                      this paper, we explore realisations of different synapses
                      build from memristive ReRAM devices, based on the Valence
                      Change Mechanism. These synapses are the 1R synapse, the NR
                      synapse and the 1T1R synapse. For the 1R synapse, we propose
                      three dynamical regimes and explore their performance
                      through different synapse criteria. For the NR synapse, we
                      discuss how the same dynamical regimes can be addressed in a
                      more reliable way. We also show experimental results
                      measured on ZrOx devices to support our simulation based
                      claims. For the 1T1R synapse, we explore the trade offs
                      between the connection direction of the ReRAM device and the
                      transistor. For all three synapse concepts we discuss the
                      impact of device-to-device and cycle-to-cycle variability.
                      Additionally, the impact of the stimulation mode on the
                      observed behavior is discussed.},
      cin          = {PGI-7 / JARA-FIT / PGI-10},
      ddc          = {540},
      cid          = {I:(DE-Juel1)PGI-7-20110106 / $I:(DE-82)080009_20140620$ /
                      I:(DE-Juel1)PGI-10-20170113},
      pnm          = {5233 - Memristive Materials and Devices (POF4-523) /
                      BMBF-16ME0399 - Verbundprojekt: Neuro-inspirierte
                      Technologien der künstlichen Intelligenz für die
                      Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0399) /
                      BMBF-16ME0398K - Verbundprojekt: Neuro-inspirierte
                      Technologien der künstlichen Intelligenz für die
                      Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) /
                      ACA - Advanced Computing Architectures (SO-092)},
      pid          = {G:(DE-HGF)POF4-5233 / G:(DE-82)BMBF-16ME0399 /
                      G:(DE-82)BMBF-16ME0398K / G:(DE-HGF)SO-092},
      typ          = {PUB:(DE-HGF)16},
      doi          = {10.3389/femat.2023.1061269},
      url          = {https://juser.fz-juelich.de/record/972102},
}