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@ARTICLE{Liu:1008543,
author = {Liu, Mingshan and Junk, Yannik and Han, Yi and Yang, Dong
and Bae, Jin Hee and Frauenrath, Marvin and Hartmann,
Jean-Michel and Ikonic, Zoran and Bärwolf, Florian and Mai,
Andreas and Grützmacher, Detlev and Knoch, Joachim and
Buca, Dan and Zhao, Qing-Tai},
title = {{V}ertical {G}e{S}n nanowire {MOSFET}s for {CMOS} beyond
silicon},
journal = {Communications engineering},
volume = {2},
number = {1},
issn = {2731-3395},
address = {[London]},
publisher = {Nature Publishing Group UK},
reportid = {FZJ-2023-02380},
pages = {7},
year = {2023},
abstract = {The continued downscaling of silicon CMOS technology
presents challenges for achieving the required low power
consumption. While high mobility channel materials hold
promise for improved device performance at low power levels,
a material system which enables both high mobility n-FETs
and p-FETs, that is compatible with Si technology and can be
readily integrated into existing fabrication lines is
required. Here, we present high performance, vertical
nanowire gate-all-around FETs based on the GeSn-material
system grown on Si. While the p-FET transconductance is
increased to 850 µS/µm by exploiting the small band gap
of GeSn as source yielding high injection velocities, the
mobility in n-FETs is increased 2.5-fold compared to a Ge
reference device, by using GeSn as channel material. The
potential of the material system for a future beyond Si CMOS
logic and quantum computing applications is demonstrated via
a GeSn inverter and steep switching at cryogenic
temperatures, respectively.},
cin = {PGI-9 / JARA-FIT},
cid = {I:(DE-Juel1)PGI-9-20110106 / $I:(DE-82)080009_20140620$},
pnm = {5234 - Emerging NC Architectures (POF4-523)},
pid = {G:(DE-HGF)POF4-5234},
typ = {PUB:(DE-HGF)16},
UT = {WOS:001478243600001},
doi = {10.1038/s44172-023-00059-2},
url = {https://juser.fz-juelich.de/record/1008543},
}