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001017905 0247_ $$2doi$$a10.48550/arXiv.2311.01171
001017905 0247_ $$2datacite_doi$$a10.34734/FZJ-2023-04417
001017905 037__ $$aFZJ-2023-04417
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001017905 088__ $$2arXiv$$a2311.01171
001017905 1001_ $$0P:(DE-Juel1)190961$$aHizzani, Mohammad$$b0$$eCorresponding author$$ufzj
001017905 245__ $$aMemristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines
001017905 260__ $$barXiv$$c2023
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001017905 520__ $$aIsing solvers offer a promising physics-based approach to tackle the challenging class of combinatorial optimization problems. However, typical solvers operate in a quadratic energy space, having only pair-wise coupling elements which already dominate area and energy. We show that such quadratization can cause severe problems: increased dimensionality, a rugged search landscape, and misalignment with the original objective function. Here, we design and quantify a higher-order Hopfield optimization solver, with 28nm CMOS technology and memristive couplings for lower area and energy computations. We combine algorithmic and circuit analysis to show quantitative advantages over quadratic Ising Machines (IM)s, yielding 48x and 72x reduction in time-to-solution (TTS) and energy-to-solution (ETS) respectively for Boolean satisfiability problems of 150 variables, with favorable scaling.
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001017905 7001_ $$0P:(DE-Juel1)174220$$aHeittmann, Arne$$b1$$ufzj
001017905 7001_ $$0P:(DE-HGF)0$$aHutchinson, George$$b2
001017905 7001_ $$0P:(DE-Juel1)188725$$aDobrynin, Dmitri$$b3$$ufzj
001017905 7001_ $$0P:(DE-HGF)0$$aVan Vaerenbergh, Thomas$$b4
001017905 7001_ $$0P:(DE-HGF)0$$aBhattacharya, Tinish$$b5
001017905 7001_ $$0P:(DE-Juel1)198908$$aRenaudineau, Adrien$$b6$$ufzj
001017905 7001_ $$0P:(DE-HGF)0$$aStrukov, Dmitri$$b7
001017905 7001_ $$0P:(DE-Juel1)188145$$aStrachan, John Paul$$b8$$ufzj
001017905 773__ $$a10.48550/arXiv.2311.01171
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