%0 Conference Paper
%A Cabrera Galicia, Alfonso Rafael
%A Ashok, Arun
%A Vliex, Patrick
%A Kruth, Andre
%A Zambanini, Andre
%A van Waasen, Stefan
%T A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology
%I IEEE
%M FZJ-2024-03293
%@ 979-8-3503-8119-1
%P 304-308
%D 2023
%X High performance ICs (Integrated Circuits) operating at cryogenic temperatures will be a fundamental part of future quantum computers, providing precise manipulation of a large number of qubits [1], [2]. However, these ICs will need regulated and stable supply voltages in situ for optimum operation due to their mixed signal nature [3], [4]. Accordingly, this paper presents the design and cryogenic electrical characterization of a voltage regulator with an integrated voltage reference. Together, the circuits can generate a regulated voltage of 1.15 V with up to 10 mA of output current capability at 6 K. The investigated circuits exploit two cryogenic MOS transistor phenomena, the threshold voltage (Vth) saturation and the transconductance (gm) increase. The circuits were developed in 22 nm FDSOI technology.
%B 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
%C 19 Nov 2023 - 22 Nov 2023, Hyderabad (India)
Y2 19 Nov 2023 - 22 Nov 2023
M2 Hyderabad, India
%F PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
%9 Contribution to a conference proceedingsContribution to a book
%U <Go to ISI:>//WOS:001227293200006
%R 10.1109/APCCAS60141.2023
%U https://juser.fz-juelich.de/record/1026116