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024 7 _ |a 10.1109/APCCAS60141.2023.00075
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024 7 _ |a 10.1109/APCCAS60141.2023
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024 7 _ |a 10.34734/FZJ-2024-03293
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100 1 _ |a Cabrera Galicia, Alfonso Rafael
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111 2 _ |a 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)
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|c Hyderabad
|d 2023-11-19 - 2023-11-22
|w India
245 _ _ |a A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology
260 _ _ |c 2023
|b IEEE
300 _ _ |a 304-308
336 7 _ |a CONFERENCE_PAPER
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520 _ _ |a High performance ICs (Integrated Circuits) operating at cryogenic temperatures will be a fundamental part of future quantum computers, providing precise manipulation of a large number of qubits [1], [2]. However, these ICs will need regulated and stable supply voltages in situ for optimum operation due to their mixed signal nature [3], [4]. Accordingly, this paper presents the design and cryogenic electrical characterization of a voltage regulator with an integrated voltage reference. Together, the circuits can generate a regulated voltage of 1.15 V with up to 10 mA of output current capability at 6 K. The investigated circuits exploit two cryogenic MOS transistor phenomena, the threshold voltage (Vth) saturation and the transconductance (gm) increase. The circuits were developed in 22 nm FDSOI technology.
536 _ _ |a 5223 - Quantum-Computer Control Systems and Cryoelectronics (POF4-522)
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650 2 7 |a Instrument and Method Development
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650 1 7 |a Engineering, Industrial Materials and Processing
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700 1 _ |a Ashok, Arun
|0 P:(DE-Juel1)176328
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700 1 _ |a Vliex, Patrick
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700 1 _ |a Kruth, Andre
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700 1 _ |a Zambanini, Andre
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700 1 _ |a van Waasen, Stefan
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773 _ _ |a 10.1109/APCCAS60141.2023
856 4 _ |y OpenAccess
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