%0 Journal Article
%A Brackmann, Leon
%A Ziegler, Tobias
%A Wouters, Dirk J.
%A Menzel, Stephan
%T Experimental Verification and Evaluation of Non-Stateful Logic Gates in Resistive RAM
%J IEEE transactions on circuits and systems / 1
%V 72
%N 5
%@ 1549-8328
%C New York, NY
%I Institute of Electrical and Electronics Engineers
%M FZJ-2024-07014
%P 2029 - 2038
%D 2025
%F PUB:(DE-HGF)16
%9 Journal Article
%U <Go to ISI:>//WOS:001346643000001
%R 10.1109/TCSI.2024.3486376
%U https://juser.fz-juelich.de/record/1034225