Journal Article FZJ-2024-07014

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Experimental Verification and Evaluation of Non-Stateful Logic Gates in Resistive RAM

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2025
Institute of Electrical and Electronics Engineers New York, NY

IEEE transactions on circuits and systems / 1 72(5), 2029 - 2038 () [10.1109/TCSI.2024.3486376]

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Contributing Institute(s):
  1. Elektronische Materialien (PGI-7)
  2. JARA-FIT (JARA-FIT)
Research Program(s):
  1. 5233 - Memristive Materials and Devices (POF4-523) (POF4-523)
  2. DFG project G:(GEPRIS)422738993 - SPP 2262: Memristive Bauelemente für intelligente technische Systeme (422738993) (422738993)
  3. BMBF 16ME0399 - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0399) (BMBF-16ME0399)
  4. BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) (BMBF-16ME0398K)
  5. BMBF 03ZU1106AA - NeuroSys: Memristor Crossbar Architekturen (Projekt A) - A (03ZU1106AA) (03ZU1106AA)
  6. BMBF 03ZU1106AB - NeuroSys: "Memristor Crossbar Architekturen (Projekt A) - B" (BMBF-03ZU1106AB) (BMBF-03ZU1106AB)

Appears in the scientific report 2025
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 Record created 2024-12-13, last modified 2025-05-12


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