%0 Conference Paper
%A Zhao, Wei
%A Kuriakose, Neethu
%A Kusuma, Sabitha
%A Ammari, Abdelaziz
%A Ashok, Arun
%A Grewing, Christian
%A Zambanini, André
%A Van Waasen, Stefan
%T On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core
%C Nancy
%I IEEE
%M FZJ-2025-01656
%@ 979-8-3503-7720-0
%P 1-4
%D 2024
%< 2024 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS) : [Proceedings] - IEEE, 2024. - ISBN 979-8-3503-7720-0 - doi:10.1109/ICECS61496.2024.10848936
%X Advancements in memory technology havepositioned memristors at the forefront of non-volatile memoryapplications, necessitating precise control mechanisms toaccurately program memristor cells to their respective states.This study delves into the utilization of a RISC-V processor andPWM generators to configure registers for analog conductancecontrol of crossbar memristor array architecture for accuratevoltage and current mode operations. The core contribution isthe development of a flexible and efficient control algorithmspecifically designed for RISC-V. A Universal VerificationMethodology Framework (UVMF) testbench is employedto validate control signals, ensuring their accuracy priorto hardware implementation. Results indicate significantenhancements in control efficiency, underlining the potential forintegrating RISC-V with memristor technology.
%B 31st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
%C 18 Nov 2024 - 20 Nov 2024, Nancy (France)
Y2 18 Nov 2024 - 20 Nov 2024
M2 Nancy, France
%F PUB:(DE-HGF)8 ; PUB:(DE-HGF)7
%9 Contribution to a conference proceedingsContribution to a book
%U <Go to ISI:>//WOS:001445799800106
%R 10.1109/ICECS61496.2024.10848936
%U https://juser.fz-juelich.de/record/1038834