Contribution to a conference proceedings/Contribution to a book

FZJ-2025-01656

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png On-Chip Advanced Control Algorithm for Memristor Operations with Integrated RISC-V Core

Zhao, W.FZJ* ; Kuriakose, N.FZJ* ; Kusuma, S.FZJ* ; Ammari, A.FZJ* ; Ashok, A.FZJ* ; Grewing, C.FZJ* ; Zambanini, A.FZJ* ; Van Waasen, S.FZJ*

2024
IEEE Nancy
ISBN: 979-8-3503-7720-0

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Please use a persistent id in citations: doi:10.1109/ICECS61496.2024.10848936

Abstract: Advancements in memory technology havepositioned memristors at the forefront of non-volatile memoryapplications, necessitating precise control mechanisms toaccurately program memristor cells to their respective states.This study delves into the utilization of a RISC-V processor andPWM generators to configure registers for analog conductancecontrol of crossbar memristor array architecture for accuratevoltage and current mode operations. The core contribution isthe development of a flexible and efficient control algorithmspecifically designed for RISC-V. A Universal VerificationMethodology Framework (UVMF) testbench is employedto validate control signals, ensuring their accuracy priorto hardware implementation. Results indicate significantenhancements in control efficiency, underlining the potential forintegrating RISC-V with memristor technology.

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Contributing Institute(s):

1. Integrated Computing Architectures (PGI-4)
2. Zentralinstitut für Elektronik (ZEA-2)

Research Program(s):

1. 5234 - Emerging NC Architectures (POF4-523) (POF4-523)
2. BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) (BMBF-16ME0398K)

Appears in the scientific report 2024

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