Master Thesis FZJ-2025-01715

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Algorithm Development For AnAutomated Memristor Control On ANeuromorphic Demonstrator Chip



2024

161 pp. () [10.34734/FZJ-2025-01715] = Masterarbeit, TU Munich, 2024

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Abstract: Advancements on in-memory technology have positioned memristors at the fore-front of non-volatile memory applications, necessitating precise control mecha-nisms to accurately program memristor cells to their respective states. Whilecommercial memristor applications primarily focus on binary data storage, theunique requirements of neuromorphic computing necessitate the ability to handlea wide range of analog values for synaptic emulation. This thesis explores theutilization of a RISC-V processor and pulse-width modulation generators to con-figure registers for analog conductance control within a crossbar memristor arrayarchitecture. The system incorporates mechanisms to read back the programmedresistance values using an analog-to-digital converter, compare these resistance val-ues to the expected outcomes, and minimize any discrepancies, thereby facilitatingaccurate voltage and current mode operations.The core contribution of this research is the development of a flexible and effi-cient control algorithm, along with an error correction algorithm specifically de-signed for the RISC-V architecture. By leveraging these algorithms, the systemcan dynamically adjust and correct the states of memristor cells, ensuring highprecision and reliability in memory operations tailored for neuromorphic comput-ing.To validate the control signals generated by the proposed algorithms, a UniversalVerification Methodology Framework testbench is employed. This comprehensiveverification process ensures that the control mechanisms are accurate and reliablebefore proceeding to hardware implementation.The results from our study indicate significant enhancements in control effi-ciency, demonstrating the potential for seamless integration of RISC-V processorswith memristor technology. This integration paves the way for advanced non-volatile memory solutions that are both robust and highly efficient, marking anotable step forward in the field of memory technology and specifically addressingthe needs of neuromorphic computing.


Note: Masterarbeit, TU Munich, 2024

Contributing Institute(s):
  1. Integrated Computing Architectures (PGI-4)
  2. Zentralinstitut für Elektronik (ZEA-2)
Research Program(s):
  1. 5234 - Emerging NC Architectures (POF4-523) (POF4-523)
  2. BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) (BMBF-16ME0398K)

Appears in the scientific report 2024
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Dokumenttypen > Hochschulschriften > Masterarbeiten
Institutssammlungen > ZEA > ZEA-2
Institutssammlungen > PGI > PGI-4
Workflowsammlungen > Öffentliche Einträge
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Open Access

 Datensatz erzeugt am 2025-02-07, letzte Änderung am 2025-02-20


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