001     1050050
005     20251219160307.0
024 7 _ |a arXiv:2505.12830
|2 arXiv
037 _ _ |a FZJ-2025-05764
088 _ _ |a arXiv:2505.12830
|2 arXiv
100 1 _ |a Kuriakose, Neethu
|0 P:(DE-Juel1)188691
|b 0
|e Corresponding author
|u fzj
245 _ _ |a 2T1R Regulated Memristor Conductance Control Array Architecture for Neuromorphic Computing using 28nm CMOS Technology
260 _ _ |c 2025
336 7 _ |a Preprint
|b preprint
|m preprint
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|s 1766156478_16309
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336 7 _ |a WORKING_PAPER
|2 ORCID
336 7 _ |a Electronic Article
|0 28
|2 EndNote
336 7 _ |a preprint
|2 DRIVER
336 7 _ |a ARTICLE
|2 BibTeX
336 7 _ |a Output Types/Working Paper
|2 DataCite
520 _ _ |a Memristors are promising devices for scalable and low power, in-memory computing to improve the energy efficiency of a rising computational demand. The crossbar array architecture with memristors is used for vector matrix multiplication (VMM) and acts as kernels in neuromorphic computing. The analog conductance control in a memristor is achieved by applying voltage or current through it. A basic 1T1R array is suitable to avoid sneak path issues but suffer from wire resistances, which affects the read and write procedures. A conductance control scheme with a regulated voltage source will improve the architecture and reduce the possible potential divider effects. A change in conductance is also possible with the provision of a regulated current source and measuring the voltage across the memristors. A regulated 2T1R memristor conductance control architecture is proposed in this work, which avoids the potential divider effect and virtual ground scenario in a regular crossbar scheme, as well as conductance control by passing a regulated current through memristors. The sneak path current is not allowed to pass by the provision of ground potential to both terminals of memristors.
536 _ _ |a 5234 - Emerging NC Architectures (POF4-523)
|0 G:(DE-HGF)POF4-5234
|c POF4-523
|f POF IV
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588 _ _ |a Dataset connected to arXivarXiv
700 1 _ |a Ashok, Arun
|0 P:(DE-Juel1)176328
|b 1
|u fzj
700 1 _ |a Grewing, Christian
|0 P:(DE-Juel1)159350
|b 2
|u fzj
700 1 _ |a Zambanini, André
|0 P:(DE-Juel1)145837
|b 3
|u fzj
700 1 _ |a van Waasen, Stefan
|0 P:(DE-Juel1)142562
|b 4
|u fzj
856 4 _ |u https://arxiv.org/abs/2505.12830
910 1 _ |a Forschungszentrum Jülich
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910 1 _ |a Forschungszentrum Jülich
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910 1 _ |a Forschungszentrum Jülich
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913 1 _ |a DE-HGF
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|v Neuromorphic Computing and Network Dynamics
|9 G:(DE-HGF)POF4-5234
|x 0
920 _ _ |l yes
920 1 _ |0 I:(DE-Juel1)PGI-4-20110106
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980 _ _ |a preprint
980 _ _ |a EDITORS
980 _ _ |a VDBINPRINT
980 _ _ |a I:(DE-Juel1)PGI-4-20110106
980 _ _ |a UNRESTRICTED


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