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| Hauptseite > Publikationsdatenbank > Cryogenic-Aware EDA-Compatible Design Libraries for FD-SOI Transistors |
| Contribution to a conference proceedings | FZJ-2026-02444 |
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2026
IEEE
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Please use a persistent id in citations: doi:10.1109/EDTM65772.2026.11497092
Abstract: Scalable quantum computers demand innovative solutions to tackle the wiring bottleneck and control an increasing number of qubits. Cryogenic electronics based on CMOS technologies are promising candidates that can operate down to deep-cryogenic temperatures and act as a communication and control interface to the quantum layer. However, the performance of transistors used in these circuits is altered significantly when cooling from room temperature to cryogenic temperatures, which motivates accurate cryogenic modeling of transistors. In this article, we report on a cryogenic simulation library tailored specifically to fully depleted silicon-on-insulator (FDSOI) transistors. We validated the accuracy of our preliminary model library by comparing simulations at both the device and circuit levels with experimental measurements from single transistors, ring oscillators, and a transimpedance amplifier (TIA). Our models effectively capture the DC behavior across the temperature range from 8 K to room temperature.
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