Contribution to a conference proceedings FZJ-2026-04983

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Memristor Conductance Control System-on-Chip Using Current Controlled Techniques in 28 nm CMOS Technology

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2026
IEEE

2026 22nd International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD), DresdenDresden, Germany, 29 Jun 2026 - 2 Jul 20262026-06-292026-07-02 IEEE 1-4 () [10.1109/SMACD70206.2026.11647798]

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Abstract: Memristive devices are typically operated using voltage driven schemes with current compliance to regulate switching dynamics. While effective, this approach often leads to abrupt current overshoot and subsequent IR drops, excessive power dissipation, and limited precision in tuning intermediate conductance states. In this work, we examine an accurate voltage driven scheme using regulated voltage pulses, thereby reducing the voltage drops at the memristor ends. In addition, a novel current controlled driving methodology is introduced, wherein the device conductance is modulated through gradual current ramping, enabling smoother and more deterministic adjustment of conductance and thereby enhancing analog programmability. These results highlight the advantages of current controlled operation over conventional voltage driven schemes, offering a pathway toward improved reliability and fine grained conductance control in memory and neuromorphic computing applications. Notably, the current controlled operation exhibits negative differential resistance (NDR) behaviour, attributed to the interplay between filament dynamics and pulse width effects, which is analysed in conductance modulation. This paper focuses on the verification of the memristor conductance control Systemon-Chip design in current mode, implemented in a 28 nm CMOS technology.


Contributing Institute(s):
  1. Integrated Computing Architectures (PGI-4)
Research Program(s):
  1. 5234 - Emerging NC Architectures (POF4-523) (POF4-523)
  2. BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K) (BMBF-16ME0398K)

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 Datensatz erzeugt am 2026-10-12, letzte Änderung am 2026-10-12


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