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000111884 0247_ $$2DOI$$a10.1109/TED.2012.2187657
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000111884 037__ $$aPreJuSER-111884
000111884 041__ $$aeng
000111884 084__ $$2WoS$$aEngineering, Electrical & Electronic
000111884 084__ $$2WoS$$aPhysics, Applied
000111884 1001_ $$0P:(DE-HGF)0$$aPadilla, J.L.$$b0
000111884 245__ $$aSimulation of Fabricated 20-nm Schottky Barrier MOSFETs on SOI:Impact of barrier Lowering
000111884 260__ $$c2012
000111884 300__ $$a1320 - 1327
000111884 3367_ $$0PUB:(DE-HGF)16$$2PUB:(DE-HGF)$$aJournal Article
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000111884 440_0 $$02508$$aIEEE Transactions on Electron Devices$$v59$$x0018-9383$$y5
000111884 500__ $$3POF3_Assignment on 2016-02-29
000111884 500__ $$aManuscript received October 21, 2011; revised December 20, 2011 and January 13, 2012; accepted February 2, 2012. Date of publication March 9, 2012; date of current version April 25, 2012. This work was supported in part by the Junta de Andalucia under Research Project TIC2010-6902 and in part by the Spanish Government under Research Projects FIS2008-05805 and TEC2008-06758-C02-01. The review of this paper was arranged by Editor Y. Momiyama.
000111884 520__ $$aIn this paper, we develop a procedure to include in device simulators the barrier lowering (BL) effects that appear in the drain and source contacts of Schottky barrier MOSFETs (SB-MOSFETs). We have checked it reproducing experimental results of 20-nm gate-length SB-MOSFETs with NiSi and epitaxial NiSi2 S/D contacts. We make use of the Wentzel-Kramers-Brillouin (WKB) approximation to get the tunneling probabilities through the lowered barriers along with an appropriate calibration of the effective masses which compensates to a large extent the lack of accuracy of the WKB model when diverting from the "wide barrier" assumption. A vertical discretization of the channel is also included to allow the barrier height dependence on the depth inside the channel. We show that corrected simulations including this effect describe in a very accurate way the behavior of these devices. We also check that the striking experimental observation of tunneling current reduction at very short gate lengths is also obtained, in contrast to the scaling behavior of conventional MOSFETs. We successfully explain this fact invoking the modification of the potential inside the channel, i.e., the overlapping of source and drain potential profiles leads to an increase of its total value even though BL mechanisms tend to decrease it in the vicinity of the contacts.
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000111884 65320 $$2Author$$aBarrier lowering
000111884 65320 $$2Author$$ametallic source/drain (S/D)
000111884 65320 $$2Author$$ananotechnology
000111884 65320 $$2Author$$aSchottky barriers
000111884 65320 $$2Author$$asemiconductor device modeling
000111884 65320 $$2Author$$aWentzel-Kramers-Brillouin (WKB) method
000111884 650_7 $$2WoSType$$aJ
000111884 7001_ $$0P:(DE-Juel1)VDB89241$$aKnoll, L.$$b1$$uFZJ
000111884 7001_ $$0P:(DE-HGF)0$$aGámiz, F.$$b2
000111884 7001_ $$0P:(DE-Juel1)VDB97138$$aZhao, Q.T.$$b3$$uFZJ
000111884 7001_ $$0P:(DE-HGF)0$$aGodoy, A.$$b4
000111884 7001_ $$0P:(DE-Juel1)VDB4959$$aMantl, S.$$b5$$uFZJ
000111884 773__ $$0PERI:(DE-600)2028088-9$$a10.1109/TED.2012.2187657$$gVol. 59, p. 1320 - 1327$$p1320 - 1327$$q59<1320 - 1327$$tIEEE Transactions on Electron Devices$$v59$$x0018-9383$$y2012
000111884 8567_ $$uhttp://dx.doi.org/10.1109/TED.2012.2187657
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