Journal Article

PreJuSER-15899

http://join2-wiki.gsi.de/foswiki/pub/Main/Artwork/join2_logo100x88.png Silicon Nanowire Tunneling Field-Effect Transistor Arrays: Improving Subthreshold Performance Using Excimer Laser Annealing

Smith, J. T. ; Sandow, C.FZJ* ; Das, S. ; Minamisawa, R. A.FZJ* ; Mantl, S.FZJ* ; Appenzeller, J.

2011

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Please use a persistent id in citations: doi:10.1109/TED.2011.2135355

Abstract: We have experimentally established that the inverse subthreshold slope S of a Si nanowire tunneling field-effect transistor (NW-TFET) array can be within 9% of the theoretical limit when the doping profile along the channel is properly engineered. In particular, we have demonstrated that combining excimer laser annealing with a low-temperature rapid thermal anneal results in an abrupt doping profile at the source/channel interface as evidenced by the electrical characteristics. Gate-controlled tunneling has been confirmed by evaluating S as a function of temperature. The good agreement between our experimental data and simulation allows performance predictions for more aggressively scaled TFETs. We find that Si NW-TFETs can be indeed expected to deliver S-values below 60 mV/dec for optimized device structures.

Keyword(s): J ; Excimer laser annealing (ELA) (auto) ; nanowire tunneling field-effect transistor (NW-TFET) (auto) ; steep-slope transistors (auto) ; ultrathin-body silicon-on-insulator (SOI) (auto)

Note: This work was supported by the Center for Functional Engineered Nano Architectonics under Grant 104295. The work of J. T. Smith was supported by the National Science Foundation in the form of a Graduate Research Fellowship. The review of this paper was arranged by Editor M. A. Reed.

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Contributing Institute(s):

1. Halbleiter-Nanoelektronik (PGI-9)
2. Jülich-Aachen Research Alliance - Fundamentals of Future Information Technology (JARA-FIT)

Research Program(s):

1. Grundlagen für zukünftige Informationstechnologien (P42)

Appears in the scientific report 2011

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